| This delay is between the sending of the Chip Select signal till the time the memory controller starts sending commands to the memory bank. The lower the value, the sooner the memory controller can send commands out to the activated memory bank and thus the faster your memory is
With 1T, the memory controller will only insert a command delay of one clock cycle
With 2T the memory controller will insert a command delay of two clock cycles
If the SDRAM command delay is too long, it can reduce performance by unnecessarily preventing the memory controller from issuing the commands sooner. However, if the SDRAM command delay is too short, the memory controller may not be able to translate the addresses in time and the "bad commands" that result will cause data loss and corruption...
Basically it seems to give you roughly about 10% difference in bandwith from some bench's I've seen..So yes you'd be better runing 2 x 512 modules really |