Page 1 of 2 12 LastLast
Results 1 to 16 of 18

Thread: AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

  1. #1
    HEXUS.admin
    Join Date
    Apr 2005
    Posts
    25,272
    Thanks
    0
    Thanked
    1,365 times in 514 posts

    AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

    Promises to use Zen architecture to "return innovation and choice to the datacentre."
    Read more.

  2. #2
    Registered User
    Join Date
    Mar 2009
    Posts
    9
    Thanks
    0
    Thanked
    0 times in 0 posts

    Re: AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

    Given these are supposed to contain 4 dies per CPU, we'll have to see how good the Infinity Fabric between them really is compared to Intel's QPI / and ring bus based uncore topology. I can see these being great for embarrassingly parallel workloads but might struggle if you have to share data via L3 cache (which is already split between each die's core complex) and LLC but we'll see

    Back of the envelope calculation comparing unidirectional bandwidth:

    Infinity Fabric: 64 lanes of PCIe 3.0 = 48.4 GB/s typical (64GB/s theoretical)
    E5 2699V4 QPI: 2 x 9.6 GT/s = 38.4 GB/s

    Looks good, makes me want to know more about inter die topology: Will each get full access to the infinity fabric or will the 64 lanes be partitioned between them?
    Last edited by een4dja; 08-03-2017 at 01:47 PM.

  3. #3
    Militant Battle Moose! CAT-THE-FIFTH's Avatar
    Join Date
    Aug 2006
    Location
    Planet Of The Moose
    Posts
    24,765
    Thanks
    2,692
    Thanked
    3,751 times in 2,902 posts

    Re: AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

    If AMD can get some SC and server wins for Naples,they can also sell AMD FirePro cards as part of the package - which means a win/win scenario.


    Go!Go! Gadget Underpants!

  4. #4
    Registered+
    Join Date
    Feb 2017
    Posts
    38
    Thanks
    1
    Thanked
    1 time in 1 post

    Re: AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

    This is what we need, keep them pressure AMD!

  5. #5
    Oh Crumbs.... Biscuit's Avatar
    Join Date
    Feb 2007
    Location
    N. Yorkshire
    Posts
    10,351
    Thanks
    1,182
    Thanked
    897 times in 707 posts
    • Biscuit's system
      • Motherboard:
      • ASRock Z77 Pro4-M
      • CPU:
      • Intel i5 3570 (Be Quiet! Dark Rock 3)
      • Memory:
      • 16GB Crucial DDR3 1866MHz
      • Storage:
      • 240GB Crucial M4, 480GB Crucial M500, 2TB Seagate SSHD
      • Graphics card(s):
      • Sapphire R9 290X Vapor-X
      • PSU:
      • XFX 650W
      • Case:
      • Lian Li PC-V359
      • Operating System:
      • Windows 7 x64
      • Monitor(s):
      • Dell U2913WM & Philips E-line 234EL2SB
      • Internet:
      • BT Infinity 80/20

    Re: AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

    Q2 Launch? Thats pretty soon! Exciting

  6. #6
    Member
    Join Date
    Jan 2017
    Location
    Norfolk (Nowhereland)
    Posts
    107
    Thanks
    7
    Thanked
    4 times in 4 posts
    • Ozaron's system
      • Motherboard:
      • MSI Z170 SLI Plus
      • CPU:
      • i5-6600K 4.2GHz
      • Memory:
      • 16GB HyperX Fury DDR4 @ 2700MHz
      • Storage:
      • Toshiba X300 4TB, WD Blue 1TB
      • Graphics card(s):
      • Sapphire R9 Fury Nitro
      • PSU:
      • Seasonic M12-II 620w
      • Case:
      • In Win 707 ATX
      • Operating System:
      • W10 Enterprise 64bit
      • Monitor(s):
      • BenQ GW2765HT
      • Internet:
      • 225KB/s at best, 0 at worst

    Re: AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

    This will be where AMD must put the skeptics to rest. Godspeed.


    .....Any chance you'll get one, Hexus?

  7. #7
    Senior Member
    Join Date
    Aug 2006
    Posts
    869
    Thanks
    4
    Thanked
    32 times in 28 posts

    Re: AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

    I hope there's a 'desktop' version with 16 cores 32 threads with a clock of say 3-3.5Ghz for under 1k and support for 8 dimms... I can dream can't I...

    They used to do an opteron on the desktop so I can hope that they do the same with these

  8. #8
    Not a good person scaryjim's Avatar
    Join Date
    Jan 2009
    Location
    Manchester
    Posts
    13,520
    Thanks
    1,069
    Thanked
    1,915 times in 1,607 posts
    • scaryjim's system
      • Motherboard:
      • HP Pavilion
      • CPU:
      • A10 4600M
      • Memory:
      • 2x 4GB DDR3-1600 SODIMM
      • Storage:
      • 1TB HDD
      • Graphics card(s):
      • Radeon HD7660G (IGP)
      • PSU:
      • Battery/HP 19v brick
      • Case:
      • HP Pavilion G6
      • Operating System:
      • Windows 10
      • Monitor(s):
      • 15" 1366x768 laptop panel

    Re: AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

    Quote Originally Posted by LSG501 View Post
    ... They used to do an opteron on the desktop ...
    The old desktop Opterons were actually the same silicon as the consumer desktop chips, using the same socket. AMD hasn't made a prosumer/workstation grade platform available in the channel since the s940 days, and even then it was only until they tweaked the platform to make it work without registered memory in s939 form. Since then a whole variety of Opteron processors have been released on socket AM[2|3](+), but the only difference between them and the equivalent Athlon/Phenom/FX CPUs were the clock speeds and TDPs.

    That said, there's currently no real comparison for Naples - AMD's Opteron line consists of single die AM3+ CPUs, single die C32 CPUs (basically the same as the AM3+ but supporting more memory and up to 2 CPUs per system), and 2 die G34 CPUs supporting up to 4 sockets.

    It looks like they plan to service that high end G34 market with an up-to 2 socket platform (increasing the dies/cores per CPU but reducing the max number of sockets available on the platform) - so G34 goes up to 16C per socket for 64C per system, while Naples is 32C/64T per socket for 64C/128T per system.

    That means they might release a replacement for C32 with 2die MCMs, and potentially only 1 socket per system (or they might remain at up to 2 sockets). Whether they'll make it to the channel for prosumer/workstation builds is another matter entirely...

  9. #9
    Senior Member
    Join Date
    Dec 2013
    Posts
    1,377
    Thanks
    104
    Thanked
    117 times in 80 posts

    Re: AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

    Quote Originally Posted by een4dja View Post
    Looks good, makes me want to know more about inter die topology: Will each get full access to the infinity fabric or will the 64 lanes be partitioned between them?
    From what i gathered reading this WCCFTech article each Naples has 128 PCI Express Gen 3.0 lanes however when configured in a 2U server 64 of those lanes are used for inter processor communication.

  10. #10
    Not a good person scaryjim's Avatar
    Join Date
    Jan 2009
    Location
    Manchester
    Posts
    13,520
    Thanks
    1,069
    Thanked
    1,915 times in 1,607 posts
    • scaryjim's system
      • Motherboard:
      • HP Pavilion
      • CPU:
      • A10 4600M
      • Memory:
      • 2x 4GB DDR3-1600 SODIMM
      • Storage:
      • 1TB HDD
      • Graphics card(s):
      • Radeon HD7660G (IGP)
      • PSU:
      • Battery/HP 19v brick
      • Case:
      • HP Pavilion G6
      • Operating System:
      • Windows 10
      • Monitor(s):
      • 15" 1366x768 laptop panel

    Re: AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

    Quote Originally Posted by Corky34 View Post
    From what i gathered reading this WCCFTech article each Naples has 128 PCI Express Gen 3.0 lanes however when configured in a 2U server 64 of those lanes are used for inter processor communication.
    I think een4dja was asking whether each die gets full access to the infinity fabric

    Since the CPUs have 128 PCIe lanes in total, each die must have 32. My guess would be that in 2P configurations the inter-CPU link is made up of 16 PCIe lanes from each die, so each die has an exclusive x16 connection to the fabric, which are then aggregated to form the x64 link between the sockets...

  11. #11
    Senior Member
    Join Date
    Dec 2013
    Posts
    1,377
    Thanks
    104
    Thanked
    117 times in 80 posts

    Re: AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

    My mistake, i confused him/her saying 64 lanes as meaning the link between the sockets.

    EDIT: Question: would or is it even using infinity fabric for communication between die's, or rather is it only using that?
    Last edited by Corky34; 08-03-2017 at 04:45 PM. Reason: Wanted to pose a question.

  12. #12
    Registered+
    Join Date
    Mar 2014
    Location
    Helion Prime
    Posts
    40
    Thanks
    2
    Thanked
    1 time in 1 post
    • fend_oblivion's system
      • Motherboard:
      • ASUS M5A78L-M/USB3
      • CPU:
      • AMD FX 4100 3.6 GHz Black Edition
      • Memory:
      • G.Skill RipJawsX 8 GB DDR3 @ 1600 MHz
      • Storage:
      • Western Digital Blue 1 TB
      • PSU:
      • Seasonic S1211 520 W
      • Case:
      • Cooler Master K380
      • Operating System:
      • Windows 7 Ultimate Edition 64-bit
      • Monitor(s):
      • Acer P166HQL

    Re: AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

    AMD has to succeed. Why? Because competition is needed to push companies into making better products. Intel has been resting on its laurels and really porking the customer in terms of its high prices. Maybe this will get Intel's attention.

  13. #13
    IQ: 1.42
    Join Date
    May 2007
    Location
    old trafford
    Posts
    813
    Thanks
    101
    Thanked
    39 times in 38 posts
    • Tunnah's system
      • Motherboard:
      • Asus P8P67 PRO
      • CPU:
      • Core i7 2700K
      • Memory:
      • 12GB DDR3-1600
      • Storage:
      • Various SSDs, 90TB RAID6 HDDs
      • Graphics card(s):
      • 1080Ti
      • PSU:
      • Silverstone 650w
      • Case:
      • Lian-Li PC70B
      • Operating System:
      • Win10
      • Internet:
      • 40mbit Sky Fibre

    Re: AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

    ...128 lanes ? Wow.

  14. #14
    Member
    Join Date
    Aug 2013
    Posts
    180
    Thanks
    0
    Thanked
    0 times in 0 posts

    Re: AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

    Ill preorder Bologna/Rome version.

  15. #15
    Not a good person scaryjim's Avatar
    Join Date
    Jan 2009
    Location
    Manchester
    Posts
    13,520
    Thanks
    1,069
    Thanked
    1,915 times in 1,607 posts
    • scaryjim's system
      • Motherboard:
      • HP Pavilion
      • CPU:
      • A10 4600M
      • Memory:
      • 2x 4GB DDR3-1600 SODIMM
      • Storage:
      • 1TB HDD
      • Graphics card(s):
      • Radeon HD7660G (IGP)
      • PSU:
      • Battery/HP 19v brick
      • Case:
      • HP Pavilion G6
      • Operating System:
      • Windows 10
      • Monitor(s):
      • 15" 1366x768 laptop panel

    Re: AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

    Quote Originally Posted by Corky34 View Post
    ... EDIT: Question: would or is it even using infinity fabric for communication between die's, or rather is it only using that?
    Well, individual dies already have "infinity fabric" for communication between the CCXes. It would appear that there's some method for connecting the fabrics in each die without reducing the number of PCIe lanes available (and of course Naples seems to have more available PCIe lanes on each die than we've seen from consumer AM4 processors anyway), but until it launches we won't know what.

    Whatever the layout is, there must be some way of connecting the 4 dies together through "infinity fabric" in such a way that the can communicate with each other and still have 32 lanes of PCIe 3.0 to the outside world. Then, if you use 2 Naples processors in a system together, half of those PCIe lanes get bound into the "Infinity Fabric" that connects the CPUs together, and to me the only sensible way to do that would be to use 16 lanes from each die - that would mean each die connects to all the other dies on its own CPU and directly to the other CPU.

    Clearly "Infinity Fabric" isn't a single connection type, though - it runs within a die and between physical CPUs, and I'm assuming it also runs between dies in an MCM CPU. That would make it more like a low level protocol: think something like TCP/IP, which describes how messages move around, vs. LAN, modems and wifi, which are different physical carriers than can transmit TCP/IP packets...

  16. Received thanks from:

    Corky34 (09-03-2017)

  17. #16
    Registered+
    Join Date
    Mar 2017
    Posts
    32
    Thanks
    0
    Thanked
    0 times in 0 posts

    Re: AMD lifts lid on 32-core Naples server CPU ahead of Q2 launch

    I've always dismissed AMD, but I will definitely have to start rethinking that. Watching to see how this turns out.

Page 1 of 2 12 LastLast

Thread Information

Users Browsing this Thread

There are currently 1 users browsing this thread. (0 members and 1 guests)

Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts
  •