Nvidia announces Tesla P100 GPU with Pascal architecture

[scaryjim]

... Those two big connectors you show in that image, one of them has PCIe signals on it.

This. You even say in one of your earlier comments - as I quoted - that one of those connectors is PCIe.

Stop confusing the protocol and the connector. Many protocols can use one connector, and one protocol can use many connectors (heck, I recently bought a motherboard that has one connector that can do SATA, PCIe, or USB, depend on what card you stick in it). If one of those connectors is carrying PCIe signals, it is a PCIe electrical connection. It is not a standard PCIe edge connector, but that's irrelevant. It carries a PCIe electrical signal.

And if it carries a PCie electrical signal - as all the information we have available confirms and which you've even said yourself, then it could be put in a PCIe x16 slot with a simple passive adapter. Because it has a PCIe electrical connection.

Anything else you'd like to misconstrue while you're here?

[lumireleon]

hehe interesting article, lets not forget the Razer laptop that comes with a USB Type-C that can be connected external to a beefy AMD/Nvidia graphics card, in the scenario there is no standard x16 Pcie connector but the signals are directed to the usb-c but hey! everything works. The idea here is CPU to GPU connection because intel CPU's don't know NvLink what they know is PCie, NvLink is GPU to GPU communication just like SLI or Xfire.

[DanceswithUnix]

NvLink is GPU to GPU communication just like SLI or Xfire.

Not quite, NvLink is a point to point link like Hypertransport or QPI.

IBM are building it into their next Power CPU, so then it will be CPU to GPU as well as GPU to GPU.

[lumireleon]

but there is no Nvlink GPU to the CPU what we see is a Pcie switch

[scaryjim]

but there is no Nvlink GPU to the CPU what we see is a Pcie switch

On the DGX-1, yes - because it uses Intel Xeon's and they don't support NVLink. So they use PCIe to communicate with the P100 (the PCIe switches are only there because the CPUs don't have enough PCIe lanes to connect directly to four GPUs each).

Servers using next generation Power CPUs from IBM will be able to put connectors directly onto the motherboard and use NVLink to communicate directly with Pascal, without needing PCIe.

[lumireleon]

the PCIe switches are only there because the CPUs don't have enough PCIe lanes to connect directly to four GPUs each......very smart/genius explanation.

[DanceswithUnix]

but there is no Nvlink GPU to the CPU what we see is a Pcie switch

Forget the DGX-1, this is what Nvidia are aiming for: https://www.olcf.ornl.gov/summit/

... and that directly connects the CPU to the GPU.

[scaryjim]

Be interesting to see the configuration when they finally finish that - one problem with connecting the CPUs into the nvlink mesh is that you'll lose a GPU-GPU connection in favour of a GPU-CPU connection. Be interesting to see how they manage that: I think 8 nodes is the most they can logically put in one mesh and still keep it down to a maximum of 2 step connection to any other node, so either they'll have to extend the step-allowance or they'll have to reduce the number of total nodes? Or perhaps the CPUs will act as hubs to connect multiple GPU meshes?

*shrug*

Perhaps I should just stop this baseless speculation?

[Corky34]

Those WiFi little cards that you get in laptops are PCIe. The modern SSDs that come on a small card and don't look anything like a hard disk, those can be PCIe. Heck, even a USB C connector can carry PCIe. Some SATA ports and network ports on motherboards use PCIe without ever even going over a connector.

Yes but we don't call a USB C connector a PCIe connector, something maybe using a PCIe protocol but we don't refer to it as PCIe, we reference things by the connection type not the protocol it uses, that would be like referring to RJ45 connectors as a TCP/IP connector.

I think you are confusing PCIe which is an electrical signalling and logical configuration standard with these edge connectors which are just an option:

I'm not confusing anything, I've already said it doesn't have a PCIe electrical connector, you can see it doesn't in the picture of the backside of the card, it seems people are confusing whats a electrical connector with the signal or protocol that the electrical connector carries, i even said as much right hear.

This. You even say in one of your earlier comments - as I quoted - that one of those connectors is PCIe.

Care to point that out to me then? Because it seems you're confusing connectors/interfaces with protocols/signals, IIRC i said "those two NVLink connectors are using the PCIe protocol"

Stop confusing the protocol and the connector. Many protocols can use one connector, and one protocol can use many connectors (heck, I recently bought a motherboard that has one connector that can do SATA, PCIe, or USB, depend on what card you stick in it). If one of those connectors is carrying PCIe signals, it is a PCIe electrical connection. It is not a standard PCIe edge connector, but that's irrelevant. It carries a PCIe electrical signal.

The only ones confusing things are the people that can't tell the difference between electrical connectors/interfaces with protocols/signals, the ones that think a electrical connection is the same thing as the electrical signal.

And if it carries a PCie electrical signal - as all the information we have available confirms and which you've even said yourself, then it could be put in a PCIe x16 slot with a simple passive adapter. Because it has a PCIe electrical connection.

So we agree then? That must mean your next comment is nothing but you being rude and looking to start an argument.

Anything else you'd like to misconstrue while you're here?

IDK is there anyone else you'd like to attack while you're here?

[watercooled]

Yes but we don't call a USB C connector a PCIe connector, something maybe using a PCIe protocol but we don't refer to it as PCIe, we reference things by the connection type not the protocol it uses, that would be like referring to RJ45 connectors as a TCP/IP connector.

Sorry but that's incorrect - PCIe is PCIe whatever connector it's over. As others have mentioned, an M.2 drive can use PCIe, a U.2 drive can use PCIe, PCIe is even used without any connectors between chips. Thunderbolt carries PCIe, USB cables can carry PCIe. The physical part is irrelevant.

When myself (and I assume others) are talking about PCIe, we mean the whole standard, not the bit of plastic commonly used to carry it between devices.

We commonly call RJ45 (technically 8P8C if you're pedantic) 'Ethernet cables'. But they could just as easily (and often do) carry voice. Equally, Ethernet has many physical standards, from coax and twisted pair to single mode and multimode fibre, to backplane and SFP twinax.

The point is that the Nvidia chips certainly do 'talk' PCIe to the CPU. NVlink is an electrical standard just like PCIe - those connectors are just mezzanine connectors which happen to be carrying NVlink, PCIe, etc.

[DanceswithUnix]

Yes but we don't call a USB C connector a PCIe connector, something maybe using a PCIe protocol but we don't refer to it as PCIe, we reference things by the connection type not the protocol it uses, that would be like referring to RJ45 connectors as a TCP/IP connector.

I think you are doing the equivalent of saying "USB" when you mean "USB Type A connector", and PCIe has far more connection options and derivations than USB. Trust me on this, the x1 to x16 motherboard connections are a fairly small and optional part of the PCIe spec.

Or let me put it this way, I bet in some Nvidia lab somewhere there are a bunch of passive cards which allow these modules to plug into a motherboard connector so that engineers can run tests on them and they probably wouldn't have any active components on them, just connectors and solder. That is possible because the P100 module understands PCIe, and that understanding is the hard part.

[jigger]

But wouldn't PCI-E 4.0 make nvidia's link redundant? Like overnight...

[watercooled]

Not necessarily, NVlink is (AFAIK) an interconnect fabric like Hypertransport or QPI; they have different priorities with regard to things like latency, clocking, overhead, etc compared to PCIe.

[Corky34]

Sorry but that's incorrect - PCIe is PCIe whatever connector it's over. As others have mentioned, an M.2 drive can use PCIe, a U.2 drive can use PCIe, PCIe is even used without any connectors between chips. Thunderbolt carries PCIe, USB cables can carry PCIe. The physical part is irrelevant.

Then why's a M.2 drive that's using PCIe called a M.2 drive? Or a U.2 drive called a U.2 drive if it's using PCIe?
The physical part, the electrical connector, is the only thing that matters because ultimately what it's connected to could be carrying Morse code, as long as there's something that understands what being sent along that joined electrical circuit, something that's normally dictated by the type of electrical connector being used, that's all that matter.

When myself (and I assume others) are talking about PCIe, we mean the whole standard, not the bit of plastic commonly used to carry it between devices.

And that's why i said way back in post #36 that..."I get the feeling though that the diagram you/they showed is like some of their other claims, that it will eventually come with a PCIe connection (that it's capable of using PCIe) but the first cards are only going to come with NVLink"

[lumireleon]

haha only if IEEE was reading this thread! but with NVlink offering 80GB/s transfer rate am sure it will be underutilized even Pciex16 is still underutilized, it all boils down to the compute speed of the GPU, software and complex nature of simulations.

[DanceswithUnix]

But wouldn't PCI-E 4.0 make nvidia's link redundant? Like overnight...

PCIe isn't so good on latency, so not really.

More to the point, as Nvidia is a founding member of the Hypertransport consortium, why didn't they use that? Perhaps under the covers it is.

haha only if IEEE was reading this thread!

At least one member is