Is this the first AMD CPU to use LGA instead of PGA?
Bit of a shame AMD has gone down route of separating the HEDT and Mainstream platforms, even if they have very much blurred the lines with AM4 so far.
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Is this the first AMD CPU to use LGA instead of PGA?
Bit of a shame AMD has gone down route of separating the HEDT and Mainstream platforms, even if they have very much blurred the lines with AM4 so far.
Well, the maybe should have created some AM4 tiers when the created the socket then as at present AM4 is meant to go all the way up to 100W (or more for overclockers), while Ryzen R3 and APUs will mostly be a lot lower than that.Quote:
Originally Posted by Biscuit
Yet if all boards are speced to support the 1800X, then all the low-wattage buyers are paying for overspeced boards in terms of VRM phases etc.
If AM4 had been designed for the rumoured 200W 16C/32T HEDT monster, all the board would have had to be vastly overspeced.
But aside from the power delivery, the biggest hurdle would be that for HEDT/workstation usage, dual channel memory is probably not enough, yet for the eventual £40 AM4 boards, quad channel would not be possible.
As an upsell though, it would be nice if this rumoured X399 platform could take full 32C/64T Naples server processors.
If it's released to consumer I believe it will be the first consumer* AMD CPU on LGA, but they've been using LGA for their server platforms for over a decade...Quote:
Originally Posted by Biscuit
* technically they had a dual socket enthusiast platform called Quad FX that used socket F and could arguably be described as "consumer", although I honestly don't remember hearing about it at the time...
I think I see your point WRG to power output and motherboard cost. Also If they'd made the sockets compatible, yet some boards didn't actually support the 150W+ CPUs, you just know some consumers would try and put them in anyway.Quote:
Originally Posted by kompukare
Honestly I would have liked to have just seen an AM4 with an additional guide notch (or something similar) which would then be omitted from the the "AM4+" boards, so that the top end ones could still support the lower CPUs but not visa versa.
Adding more memory channels is a new socket layout, I really don't think you can get around that. If you want that much RAM there is a good chance you want extra IO as well and a bunch more PCIe lanes also adds to pin count and TDP.Quote:
Originally Posted by Biscuit
I think keeping dual and quad memory platforms separate would be a reasonable thing. Nice to see the end of single channel, even budget phones are getting too quick for single channel these days.
Sounds like a 'desktop' board/cpu for the server chip (16c/32t) thats been mentioned in previous articles to me....
Curious to see it's price and if it can run on non ecc memory because if they can release it at around 1k that would blow intel out of the water for 3D rendering etc for me personally, especially if they can get on top of that single core issue.
Maybe it is the return to good old days of a server grade chip on the desktop like s939 opterons.
The chip you've linked to is the 32 core/64 thread Naples chip, which uses 4 dies and has 8 memory channels.Quote:
Originally Posted by LSG501
This is an "in-between" chip - 2 dies, up to 16 cores, only 4 memory channels. It makes sense as a lower end server and workstation chip, if AMD feel they can afford to segment their marketing like that. Running three sockets would be bold, but they currently run 2 server sockets so it would fit with their current market segmentation.
My guess (if this rumour turns out to have substance) is that the top end chip would be £1000+ (after all, it's two full Zeppelin dies, a larger lga package and some means of connecting the two dies in an MCM, so you'd expect that it might cost more than twice an 1800X) but there'll also be 8 core and 12 core variants (using pairs of 2+2 and 3+3 core dies) that start much closer to the £500 they're currently asking for the top-end AM4 chip.
The motherboards are likely to be more expensive than AM4 - they'll need to route out a lot more pins from the CPU socket to provide the extra memory channels and PCIe lanes, and they'll be firmly targeted at the workstation market, so don't expect to buy one for less than £200. OTOH they could provide as many as 64 PCIe lanes from a single socket, depending on how they choose to specify the southbridge complex on the SoCs.
To me this platform feels inevitable, somehow - I can't see them going below 16 cores on Naples (that'd be 4 dies in a 2+2 configuration) and while the jump from 8 cores to 16 cores isn't huge, the jump from 2 to 8 channel memory, and from 24 PCIe lanes to 128, is. The chance to fill that gap with an 8 - 16 core part with 4 memory channels and 40+ PCIe lanes just looks like an open goal to me. Here's hoping AMD can hit it...
Yeah for some reasons I got my numbers muddled up (too early lol) but I still think it's the same situation with the approach.Quote:
Originally Posted by scaryjim
While I don't expect the top 32c/64t to be a mainstream part, too expensive and might not even be available to consumers, they do still need a board for it so would make a platform for it, and as you say the 32c/64t is 4 dies so this lesser model would be a perfect way to use 'faulty' ones imo.
When you think about it from an economic standpoint it makes sense too because the main target for the 32c/64t would not really want a lesser model so all the 'faulty' ones would be thrown away unless they do something else with them. So using them in a 'consumer' cpu with faulty dies disabled (like nvidia with geforce for example) doesn't really cost amd anything to do (apart from a few quick laser cuts on the interconnects most likely) but they can then make profit off the parts so win win for amd.
edit: also seems there is a naples sku for 16c/32t so.....
Hmmm, I wonder if you're misunderstanding how the MCM chips work?Quote:
Originally Posted by LSG501
If there were faulty dies, they wouldn't get put in the MCM in the first place. They'll qualify and bin the dies off the production line before assembling any CPUs. They'll then select the ones with appropriate characteristics (clock/voltage curve, leakage etc.) and package them onto the substrates to make the final CPUs. So you wouldn't get a 4 die assembly with any faulty dies in it - the faulty dies would be taken out before the MCM is constructed.
So Naples processors will always be made from 4 working dies.
In a sense you're right about disabling faulty parts, but that would be within a die - which is where the 6 and 4 core Ryzen parts come from (faulty cores in each die are disabled). That's why I think we'll also see 16 and 24 core Naples parts - they'll still be made of 4 dies, but each die will have either 4 or 6 cores enabled instead of 8. That lets them change the core count but keep all the memory channels and PCIe lanes active.
The 16 core workstation part would be a separate MCM made from 2 dies to start with, on a completely separate socket.
I thought they were being made as one 'big chip' so while 4 dies might be being used they're all being produced on the same 'piece of silicon' rather than 'lego' approach you suggest... at least thats how it looks to me on the pictures I've seen.Quote:
Originally Posted by scaryjim
In essence I'm seeing it like AMD are going back to the early dual core cpu's which were basically two cpu's cut on one piece of silicon with a 'new' built in interconnect between them rather than being on the motherboard.
I read the post as "faulty die" meaning "imperfect die", as in a harvested one with disabled cores. That would make more sense to me.Quote:
Originally Posted by scaryjim
We are already looking at three AMD platforms here either rumoured or available:
1/ AM4
2/ Naples quad die on MCM
3/ HPC part with mixed compute, graphics and HBM2 on interposer
For desktop/workstation use I can see a clockspeed tweaked Naples having a market. I have spent the last few years compiling code on machines with 6 core xeons with 4 channel ram totalling 64GB and the FPGA guys needed 128GB minimum in their rigs. I expect that a market for 32 threads is going to want a ton of ram, and ECC at that.
It is more like Lego, dies are tested and assembled into a module that holds them all. That keeps the cost manageable.Quote:
Originally Posted by LSG501
Hmm, no, everything I've seen and read suggests an MCM of 4 dies - they wouldn't say "die" if it was all one piece of silicon, as a die is a discrete unit.Quote:
Originally Posted by LSG501
I'm not even sure that a 32 core Zen CPU would be possible to fabricate on a single die - there's a maximum chip size that can be created and something 4x the size of Zeppelin would surely get very close to that. Plus it'd be a huge risk to make a 32 core monolithic die: yields decrease with die area so trying to making the whole chip out of one piece of silicon would make QC nightmarish - any die with an error in the fabric/IMC/PCIe cluster etc. would lose you the whole 32 core chip ...
Potentially, but you'd still be looking at 4 dies per chip, 8 memory channels - you'd have to hack a lot of stuff out of that to make a sensible workstation power/clock/price proposition. Whereas a separate 2 die MCM for workstation would fit straight into the market - 4 memory channels would give 128GB using 16GB DIMMs, 2 dies clocked at R7 1700 levels would give you a ~ 130W TDP, you'd have a minimum of 36 PCIe lanes free and up to ~ 60; it just matches up so well to the comparable Intel offerings. Why make a 4 die MCM then have to tweak and reduce it when you can make a 2 die MCM that fits?Quote:
Originally Posted by DanceswithUnix
As to the HPC processor - I get the feeling that's more of a concept design to big up the semi-custom part of the business than a proposal for a mass-market platform. It'd be a very niche product.