AMD discusses Precision Boost Overdrive on Ryzen 3000 CPUs

[HEXUS]

AMD's Robert Hallock gets his blackboard out again. And AMD shares a GameCache video too.

Read more.

[EvilCycle]

I like the general idea of PBO and I'm not aware of any major issues with it, but the automatic voltage controlling in particular scares me, I mean it is probably paranoia and I'm sure AMD have thought this through... but bugs/glitches or malicious attacks on something like this could potentially be devastating to the system if it's possible. If someone else here knows a lot about this feature please let me know how safe or dangerous this really is? I am considering a new Ryzen chip for a friends build so the more I know about them the better.

[kalniel]

Hang on, I don't get this.

Each core has its own cache (L1 and L2). And they share access to L3. AMD is adding these all together and saying that the total cache increases as you add more cores, because each core comes with its own cache. So far, so good.

Then AMD says more cache means better gaming. Which again, is kind of true - if you increase L3 cache, and/or increase the per-core cache then you might get better fps.

But saying that increasing the number of cores increases gaming because of the increased cache is entirely misleading. You aren't increasing any per-core cache, and you aren't increasing the L3 cache. The only way adding a new core's cache into the mix is if you allow cores to use the L2 cache from a different core, which I don't think AMD do.

Hexus, can you get clarification from AMD?

[YazX]

I like the general idea of PBO and I'm not aware of any major issues with it, but the automatic voltage controlling in particular scares me, I mean it is probably paranoia and I'm sure AMD have thought this through... but bugs/glitches or malicious attacks on something like this could potentially be devastating to the system if it's possible. If someone else here knows a lot about this feature please let me know how safe or dangerous this really is? I am considering a new Ryzen chip for a friends build so the more I know about them the better.

why its dangerous ?!?

i dont get your fears, no matter what you do, the CPU will throttle if the generated heat reaches the max safe temps, so it doesnt matter, it will just overclock itself to the max safe temp point.

and malicious attacks of what?! you mean viruses could play with these settings?! if yes, then as i said it will not harm the CPU as it will throttle automatically to avoid damage.

[philehidiot]

I like the general idea of PBO and I'm not aware of any major issues with it, but the automatic voltage controlling in particular scares me, I mean it is probably paranoia and I'm sure AMD have thought this through... but bugs/glitches or malicious attacks on something like this could potentially be devastating to the system if it's possible. If someone else here knows a lot about this feature please let me know how safe or dangerous this really is? I am considering a new Ryzen chip for a friends build so the more I know about them the better.

I've used automatic voltage scaling on an Asus mobo and it is VERY conservative. It doesn't even go near the kind of voltages I'd manually set as a starting point for an overclock and a lot of the time is undervolting. That said, I think I got lucky with the silicon as comparing my auto overclock results to what people are getting with manual stuff was only a couple of hundred MHz off. I'd say for a zero effort (well, changing a few BIOS parameters to enable the auto overclock and allow automatic control of other associated features) overclock that's nay so bad.

My system is getting less and less responsive and so I think I'm going to get pushed into upgrading to Zen 3 series. I think the Intel security issues are what has finally killed it, possibly combined with people optimising software for features supported by modern hardware that mine just doesn't have.

[EvilCycle]

Thanks guys, I was of the mind that I was just being over cautious, but hey if you ask no questions then you get no answers!

[habilain]

Hang on, I don't get this.

Each core has its own cache (L1 and L2). And they share access to L3. AMD is adding these all together and saying that the total cache increases as you add more cores, because each core comes with its own cache. So far, so good.

Then AMD says more cache means better gaming. Which again, is kind of true - if you increase L3 cache, and/or increase the per-core cache then you might get better fps.

But saying that increasing the number of cores increases gaming because of the increased cache is entirely misleading. You aren't increasing any per-core cache, and you aren't increasing the L3 cache. The only way adding a new core's cache into the mix is if you allow cores to use the L2 cache from a different core, which I don't think AMD do.

Hexus, can you get clarification from AMD?

In my opinion, not entirely misleading, although not entirely accurate either. By having more cores you can avoid scheduling background tasks on the cores being used for gaming. As well as the obvious effects of more CPU time going to the game (or any other task that uses 100% of a low number of CPUs), this will also result in using the L1/L2 of a different core for the background tasks, and therefore reduce the effects of cache pollution.

So having more cores will improve the performance of the L1/L2 cache by avoiding contention between tasks. Indeed this is what I understand AMDs suggested patches to Windows for the Ryzen 3000 series (which were distributed in May, I think) to do. Windows normally tries to load one core up fully before allocating to other cores to take advantage of single core turbo clocks, and the new AMD behaviour is to try and distribute tasks a bit more across the cores.

[kalniel]

In my opinion, not entirely misleading, although not entirely accurate either. By having more cores you can avoid scheduling background tasks on the cores being used for gaming. As well as the obvious effects of more CPU time going to the game (or any other task that uses 100% of a low number of CPUs), this will also result in using the L1/L2 of a different core for the background tasks, and therefore reduce the effects of cache pollution.

So having more cores will improve the performance of the L1/L2 cache by avoiding contention between tasks. Indeed this is what I understand AMDs suggested patches to Windows for the Ryzen 3000 series (which were distributed in May, I think) to do. Windows normally tries to load one core up fully before allocating to other cores to take advantage of single core turbo clocks, and the new AMD behaviour is to try and distribute tasks a bit more across the cores.

So nothing to do with more cache, as they claim?

[tkowalcz]

The only way I think this might work is if you don't need all the cores.

If you have L3 shared among 4 cores (for some theoretical architecture) and 4 gaming threads then every thread will have to play in the same L3 cache.

Lets double the cores to 8 and have twice more cache (e.g. two separate L3 caches). Then each of these 4 threads will get more L3 to play with.

Since games are rather limited in number of threads they use (? - my assumption) and there are AMD CPUs with 16, 32 and more cores then that limited number of threads get more and more L3 cache. Until the case when each thread can be scheduled on it's own core complex, have own L3 cache and no other thread will be scheduled on other cores that share that cache.

[Lanky123]

When the marketing lot get involved a tenuous link to reality is about the best you can hope for I suppose. There must have been a meeting where someone decided they needed the word 'game' or 'gaming' thrown in somewhere and this was the best they could come up with. Should we be grateful they didn't describe the processors as having 'RGB Cores'?

[Xlucine]

The video specifically mentions X570 - hopefully the refined PBO isn't locked to that chipset. What happened to older boards offering "the same performance on those 3rd Gen Ryzen processors as the X570 will"?

The only way I think this might work is if you don't need all the cores.

If you have L3 shared among 4 cores (for some theoretical architecture) and 4 gaming threads then every thread will have to play in the same L3 cache.

Lets double the cores to 8 and have twice more cache (e.g. two separate L3 caches). Then each of these 4 threads will get more L3 to play with.

Since games are rather limited in number of threads they use (? - my assumption) and there are AMD CPUs with 16, 32 and more cores then that limited number of threads get more and more L3 cache. Until the case when each thread can be scheduled on it's own core complex, have own L3 cache and no other thread will be scheduled on other cores that share that cache.

Zen3 has a constant 32 MB of L3 cache until you hit 39XX levels

[kalniel]

The only way I think this might work is if you don't need all the cores.

If you have L3 shared among 4 cores (for some theoretical architecture) and 4 gaming threads then every thread will have to play in the same L3 cache.

Lets double the cores to 8 and have twice more cache (e.g. two separate L3 caches). Then each of these 4 threads will get more L3 to play with.

Since games are rather limited in number of threads they use (? - my assumption) and there are AMD CPUs with 16, 32 and more cores then that limited number of threads get more and more L3 cache. Until the case when each thread can be scheduled on it's own core complex, have own L3 cache and no other thread will be scheduled on other cores that share that cache.

I see what you mean, but it's actually the specific jump between one chiplet and two chiplet designs, as long as CPUs in one chiplet can access the L3 cache of a different chiplet without penalty. We'll have to wait for the reviews I guess to test that one.

[kalniel]

Ah, Anandtech have the answer:
https://www.anandtech.com/show/14525...d-epyc-rome/11

AMD manages its L3 by sharing a 16MB block per CCX, rather than enabling access to any L3 from any core.

So actually.. it's like this..

The 3600s have 6 cores, two CCXs and one chiplet. L3 cache of 16mb per CCX.
The 37/800 have 8 cores, two CCXs and one chiplet. Still only 16mb L3 per CCX, so cache per core decreases.
The 3900 has 12 cores, four CCXs and two chiplets. Still only 16MB L3 per CCX, back to the same situation as for the 3600
The 3950 has 16 cores, four CCXs and two chipsets.. same situation as the 37/800.

So I really don't get where AMDs statement about having more cores increases gaming because of more cache comes from. The amount of cache each core can access stays the same (or decreases) as you add cores!

[Corky34]

Hang on, I don't get this.

Each core has its own cache (L1 and L2). And they share access to L3. AMD is adding these all together and saying that the total cache increases as you add more cores, because each core comes with its own cache. So far, so good.

Then AMD says more cache means better gaming. Which again, is kind of true - if you increase L3 cache, and/or increase the per-core cache then you might get better fps.

But saying that increasing the number of cores increases gaming because of the increased cache is entirely misleading. You aren't increasing any per-core cache, and you aren't increasing the L3 cache. The only way adding a new core's cache into the mix is if you allow cores to use the L2 cache from a different core, which I don't think AMD do.

Hexus, can you get clarification from AMD?

I think you may have misinterpreted the marketing, they're not saying more cores means more cache, they're saying "More cores." (full stop), "More cache." (full stop).

[kalniel]

I think you may have misinterpreted the marketing, they're not saying more cores means more cache, they're saying "More cores." (full stop), "More cache." (full stop).

Except where they say 'means' between the two... ie 'More cores' 'means' 'more cache'.

https://youtu.be/pwsLSrcoCgE?t=10

[Corky34]

My mistake, i missed the "means" part, that's rather misleading isn't it.

I can see where the marketing is coming from, Ryzen 3 has more cores, it has more cache, therefor more cores means more cache, they're committing a correlative fallacy but i suspect people who know there's different levels of cache aren't really their target audience.