Read more.A leaked slide indicates they will. The same slide flags up low-end Comet Lake refresh CPUs too.
Read more.A leaked slide indicates they will. The same slide flags up low-end Comet Lake refresh CPUs too.
Typo. I'm confident on that one! it's 8 Core 16 thread. Typos in presentations by large companies are more common than many people might think.
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I thought it was a typo yesterday but there seems to be a few other hints it actually isn't, and it's just segmentation by multithreaded/multitasking performance, whilst providing 4 full non-SMT cores for higher performance needs. I think Intel are going to use multi-tasking (not just multithreading) benchmarks heavily here, they must have found a niche where they perform well still.
Intel CPUs can now have SMT enabled/disabled on a per-core basis already, so this is just cementing that functionality in at the point of sale.
Personally I think it's confusing for the consumer, when you can just adjust base-clocks down a bit for the i7 versus the i9.
Alternatively, they have massive power consumption issues that are exacerbated by SMT, so they need to minimise that in the i7 to meet a TDP requirement.
It's going to have to with the the big-little type CPUs on the way. There's already 'preferred' core type scheduling as well.
eg: https://www.anandtech.com/show/15877...u-need-to-know
It could be so they can put non-critical threads on the SMT enabled cores and critical security conscious threads on the non SMT enabled cores as Hyper Threading should be disabled if you want security![]()
My biggest issue here is that the chip below in the stack is 6C/12T, and the one above is 8C/16T. So *those* chips seem to be pretty conventional, which to me makes little sense to do some screwball threading layout in the chip between them which is bound to cause scheduling anomolies. Compare that to the conventional Intel idea that you just switch off threading on the i7 to make an i5, this smacks of typo.
Besides, the big-little style is a lot more clear cut, stuff that dawdles gets farmed out to the Atom cores, bursts of furious activity go to the big core(s). There's some tuning in where the cutoff is, but the principle is easy. But threaded vs non threaded big cores? Whilst there could be reasons for that (ie laying out the non threaded cores to favour low power consumption and not be able to clock as high) if they just switched the threading off on half the cores then when do you use them? You also can't always use all those cores on the same program, interactive performance always follows the slowest core though it would benefit bulk compute programs like Blender.
Only 8 cores on the i9? Either they're expecting >25% per-core performance gains, or the multicore performance will go down compared to 10th gen
Seems to me that Intel are reacting to AMD here, Ryzen 5, 6c/12t, and so on, so for the i5 to follow suit isn't exactly unexpected..
I might put off my server re/size/build until new things are released..
Certainly it makes it simpler to have all HT or no HT.
If real, I think it's more likely they'll boost the non threaded cores higher, so you just set them as preferred cores which is possible in the existing scheduler logic. Then under lightly threaded situations you're using faster non HT cores and only under highly threaded loads do you spill into the HT cores.Besides, the big-little style is a lot more clear cut, stuff that dawdles gets farmed out to the Atom cores, bursts of furious activity go to the big core(s). There's some tuning in where the cutoff is, but the principle is easy. But threaded vs non threaded big cores? Whilst there could be reasons for that (ie laying out the non threaded cores to favour low power consumption and not be able to clock as high) if they just switched the threading off on half the cores then when do you use them? You also can't always use all those cores on the same program, interactive performance always follows the slowest core though it would benefit bulk compute programs like Blender.
Shows how out of the loop I am, I've got an i5 3470 here![]()
Lakefield is already in devices and Windows appears to be entirely unaware of it, so I wouldn't confidently assume it'll ever be managed efficiently.
The performance delta between 8/12 and 8/16 has got to be microscopic. Especially at a similar 125W TDP, or whatever they claim on them.
Feels either like typo, or they are experimenting with something. I doubt they will do big little design with Rocket Lake, with fast non-Hyoerthreaded cores and slower Hyperthreaded cores for multitasking and heavier stuff. With 4 cores with Hyperthreading and 4 without. But could be that they might selectively disable Hyperthreading on some cores to force Microsoft to update Windows task scheduler to work with non-symetric architecture to prepare for big little design. Since I doubt process would be smooth and that could get stuff fixed till then. Just like nVidia got raytracing out with RTX cards, so developers can start using it, even if performance is poor and if will take another generation to get good raytracing performance. But unlike before, world is far more ready for adoption.
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