Details about AMD's low-power low-cost Van Gogh APU emerge

[DanceswithUnix]

I would imagine for the same reason Intel have been re-customising the Core design for the last decade or so. I'm not going to pretend to know their reasons but a Van Gogh chip using RDNA 2 is defiantly a thing.

OK, I'm not disputing it using RDNA 2, just that I don't see a causal link to console chips.

Let me put it another way. SoC design is hierarchical, and an HDL allows you to create instances of hardware blocks in your design. So in an xbox chip the top level design will call up 2x Zen2 CCXs and a bunch of RDNA CUs. In this Van Gogh case, you get one CCX and something like 10 RDNA2 CUs. My point is that there is an absolute ton of other stuff going on in an SoC in terms of PCIe connectivity, memory interfacing, SerDes lanes for SATA + USB + etc.

So, if I wanted to make a low cost laptop chip, I would start with AMD's usual fabric, hang the usual laptop IO and memory off it connected to the usual AMD laptop pinout (to make integration and driver issues easier) and create instances of the required quantities of CPU and GPU cores. If it just happened to end up sharing some blocks with a games console, then that would be entirely by accident.

Now perhaps this isn't an accident, perhaps Microsoft want to make an Xbox compatible Surface. But more likely, AMD saw some risk in using Zen3 in a budget market where Zen 2 is plenty, but RDNA2 is more cache friendly and would be ideal in an APU with limited memory bandwidth.

[Corky34]

OK, I'm not disputing it using RDNA 2, just that I don't see a causal link to console chips.

I get the feeling people have taken me saying they're based on the PlayStation and Xbox Soc's when the TPU article said "The APU is believed to be a design similar to the one found in the SoC of the latest PlayStation 5 and Xbox Series X/S consoles" a little too literally, i did provide a link to the article and perhaps should've quoted that line verbatim rather than simply saying "based on", i expected people would read the article rather than take my word as gospel, apologises.

I assumed "a design similar", "based on", the console SOC's would be interpreted in the same way as i did, that the APU having more in common with the features of console SOC's than previous gen APU's.

[scaryjim]

I'm sure the dual core Athlon 3000 series die started off as an embedded part for controlling advertising displays etc. That might explain the oddball look of these.

That was pretty much my thought - it's likely to essentially be an embedded/industrial part that might find its way into the low-end consumer stack. It would also explain using a more established core architecture to allow more mature drivers/compiler support etc.

I suspect you're right about RDNA 2 being used as it's low-bandwidth-friendly. Also given the core clocks we've seen it hitting in dGPUs I wonder if it can hit 1~1.5GHz with practically no voltage/power draw, allowing them to really can power draw across the SoC: I've seen comments around 7.5W - 15W target, but I'd hope 4 Cores + 10 RDNA CUs could go lower than that...

[Xlucine]

They've never been wrong in the past

Lots of noise from that guy, very little signal. I'd like to buy a cheap 4C zen2 APU, and it's probably a lot easier to put a zen2 CCX in a design than half a zen3 CCX, but why would AMD waste 7nm wafers on this in the current climate?