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Lays the groundwork for shifting tasks between high performance and efficiency CPU cores.
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Lays the groundwork for shifting tasks between high performance and efficiency CPU cores.
I wonder if the new Intel and AMD CPUs doing this,is the reason why we are having Windows 11?? It will be interesting to see if ADL works better with Windows 11.
I assumed Win 11 was another attempt to extract recurring revenue from us.Quote:
Originally Posted by CAT-THE-FIFTH
This patent from AMD is interesting in that it implies AMD might be able to do two different cores again. They seemed too low on engineering resources to split some off on a modern Jaguar replacement to make this work. Not that I ever saw much point of a hybrid cpu in a PC. Unless perhaps they are all the same core design, just some are layed out on the silicon for lower clock speed at lower power so when the fast CPUs have to downclock to their all core maximum they become the same speed as the "slow" cores.
It's not useful in Win 10 currently as the scheduler is, to be fair, pants. However now Linux, some Mac os thingy and other OS's are all much better at handling mixed core types I'm guessing, well speculating that Win 11 is the reason for this and is basically a new way of Windows working. If I hear another person telling me how great the M1 chip is this shows how people think it's the greatest thing since, well erm, sliced bread, this proves that Windows will have to catch up. Thing is it will *probably* break a huge amount of older softwareQuote:
Originally Posted by DanceswithUnixI assumed Win 11 was another attempt to extract recurring revenue from us.Quote:
Originally Posted by CAT-THE-FIFTH
This patent from AMD is interesting in that it implies AMD might be able to do two different cores again. They seemed too low on engineering resources to split some off on a modern Jaguar replacement to make this work. Not that I ever saw much point of a hybrid cpu in a PC. Unless perhaps they are all the same core design, just some are layed out on the silicon for lower clock speed at lower power so when the fast CPUs have to downclock to their all core maximum they become the same speed as the "slow" cores.
This is exactly why Win 11 is needed. It's not how the others do it, they have much much better schedulers. AMD however is moving a lot of the work into hardware so it might mean better compatibilityQuote:
Originally Posted by DanceswithUnixI assumed Win 11 was another attempt to extract recurring revenue from us.Quote:
Originally Posted by CAT-THE-FIFTH
This patent from AMD is interesting in that it implies AMD might be able to do two different cores again. They seemed too low on engineering resources to split some off on a modern Jaguar replacement to make this work. Not that I ever saw much point of a hybrid cpu in a PC. Unless perhaps they are all the same core design, just some are layed out on the silicon for lower clock speed at lower power so when the fast CPUs have to downclock to their all core maximum they become the same speed as the "slow" cores.
This patent is interesting to me not because it's another company looking at big.LITTLE (Papermaster hinted/specifically didn't deny that they were looking at it early last year) but the fact this appears to be OS-agnostic. This means that adoption for it will be easy and can be a practical drop in replacement for existing architectures.
What is also very interesting is the fact it can look at optimising the switch to using GPU cores as well. So Intel has ASICs in their CPUs, like AVX etc, that have to be specifically called by an application to be utilised and if someone codes their application to not specifically use the ASIC then it will sit on the general purpose silicon which will be very slow. However, with this patented solution, AMDs core manager will be able to go "hey, that's vectorised mathematics" and move the thread over to the GPU cores for the duration of that thread tasks. This means that AMD won't have to resort to ASICs like Intel (although they might still do so with the Xilinx acquisition) and will be able to have extremely diverse heterogenous compute systems that don't rely on the developer to specifically code path for it at every step.
I expected AMD to look at a split architecture because it does make sense for mobile systems, less so for Desktops (but we shall see), but this does have a big benefit that Alder Lake will flounder over and that is core difference compatibilities. When Alder Lake is in full hybrid mode, you will not be able to take advantage of half the ASICs (AVX etc) available so for high performance desktops, it makes no sense to buy an Alder Lake system which you have to disable the hybridisation just to use the full feature set. Whereas with this methodology by AMD, it looks like it doesn't matter at all because if the thread has specific characteristics/needs, it'll just move it automatically.
I hope AMD move forwards with this to a working demo, their implementation is quite..."refined". Maybe they looked at Alder Lake and observed "how they could do better"...
It could be if you use Alder Lake on Windows 10, the hybridisation is disabled...Quote:
Originally Posted by CAT-THE-FIFTH
We're about to hit Ryzen 6000 series in 2022 (IIRC), not sure how the 8000 series will be the first hybrid core processors when the x000 numbering convention is on a 12-16 month cadence meaning these will be 2024 at the earliest. That and Zen 5 would be at least 2023 from the last roadmap?Quote:
The latest rumours suggest it will be the AMD Ryzen 8000 series (dubbed Strix Point) CPUs / APUs which will be the first hybrid core processors from AMD. We are probably looking at 2022 for these AMD processors to emerge, boasting a mix of "high-performance Zen 5 cores and low-powered Zen '4D' cores,"
This is also my take on it. I reckon though that if Microsoft are clever, make it a *free* upgrade and as said compatibility mode disables the hybrid side it could be a winnerQuote:
Originally Posted by TabbykatzeThis patent is interesting to me not because it's another company looking at big.LITTLE (Papermaster hinted/specifically didn't deny that they were looking at it early last year) but the fact this appears to be OS-agnostic. This means that adoption for it will be easy and can be a practical drop in replacement for existing architectures.
What is also very interesting is the fact it can look at optimising the switch to using GPU cores as well. So Intel has ASICs in their CPUs, like AVX etc, that have to be specifically called by an application to be utilised and if someone codes their application to not specifically use the ASIC then it will sit on the general purpose silicon which will be very slow. However, with this patented solution, AMDs core manager will be able to go "hey, that's vectorised mathematics" and move the thread over to the GPU cores for the duration of that thread tasks. This means that AMD won't have to resort to ASICs like Intel (although they might still do so with the Xilinx acquisition) and will be able to have extremely diverse heterogenous compute systems that don't rely on the developer to specifically code path for it at every step.
I expected AMD to look at a split architecture because it does make sense for mobile systems, less so for Desktops (but we shall see), but this does have a big benefit that Alder Lake will flounder over and that is core difference compatibilities. When Alder Lake is in full hybrid mode, you will not be able to take advantage of half the ASICs (AVX etc) available so for high performance desktops, it makes no sense to buy an Alder Lake system which you have to disable the hybridisation just to use the full feature set. Whereas with this methodology by AMD, it looks like it doesn't matter at all because if the thread has specific characteristics/needs, it'll just move it automatically.
I hope AMD move forwards with this to a working demo, their implementation is quite..."refined". Maybe they looked at Alder Lake and observed "how they could do better"...
It could be if you use Alder Lake on Windows 10, the hybridisation is disabled...Quote:
Originally Posted by CAT-THE-FIFTH
It also means they don't have to put a silly amount of effort into working on a dead OS if Win 11 is going to kick 10 to the curb.Quote:
Originally Posted by 3dcandy
Objectively, it makes sense to me, also means that Alder Lake doesn't look like an absolute pile of trash because Win 10 can't actually support it properly because the SDL is pants. It's in Intels best interest and if AMD is looking at it too, well you can bet bottom dollar that Windows is looking at this for Windows on Arm, then Intel with Alder Lake then when AMD filed this patent they definitely spoke to MS about it. So MS makes an easy choice to kybosh the "Windows 10 is the last Windows" and at the same time, moves away from the legacy Windows 7, 8 legacy integrations and deepens their hooks into us all.
Win win for Microsoft...
There is NO reason that Windows for ARM can't support big.little apart from they really seem unable to get it to run erm wellQuote:
Originally Posted by Tabbykatze
The scheduler code etc. is easily available, Linux and Apple did it years ago and Android as well does it very well.
Absolutely, there is no reason they can't support it but I wonder how much of it is M$ arrogance versus their development strategems causing issues.Quote:
Originally Posted by 3dcandy
Bit of both, but also they haven't really moved the ARM side away from Windows X86 much at all probably for ease but that means that take up is extremely poor. Had this conversation before, plenty of companies would make a chip similar to the M1 if there was any real need or support for it. Imagine an octacore cpu with some nice optimisations and a half decent gpu in say 10 watts for use in a laptop or thin and lightQuote:
Originally Posted by Tabbykatze
I mean, we're seeing that right now with the M1 and as much as I despise Apple for their business practices, they have a serious amount of design wins and chutzpah with the M1 and am thoroughly looking forward to seeing the M2.Quote:
Originally Posted by 3dcandy
I think the biggest thing they did was to make ASIC bolt ons to accelerate x86 emulation which meant running x86 apps was not as crippling as what happened with Windows on Arm.
I vaguely remember Intel getting very litigious at one point about Apple and their custom silicon with x86 compatibility and I wonder if Apple walked into whatever Intel CEOs office at the time, plonked a middle finger on the table and walked back out. Or maybe back door acceptances, who knows.
I think the fact that Intel basically failed to give Apple what they wanted for at least 5 years forced their hands (on both sides)Quote:
Originally Posted by Tabbykatze
I expect so too, that and probably someone inside Intel realised that throwing their weight around while their troubles were really starting to begin to wash out probably wasn't a good idea.Quote:
Originally Posted by 3dcandy
x64 & x64? Cmon.. give me an x64/ARM hybrid.
AMD already has ARM hybrid technically, it has an ARM co-processor security functionality...if I'm being pedantic :PQuote:
Originally Posted by maxopus
(I think Intel does too)
But it's one thing moving into x86 with heterogenous core designs, it's another to have heterogenous computing with completely different architectures. Baby steps!
That would be virtually impossible to do lolQuote:
Originally Posted by Tabbykatze
All I can think of is a failed mutation experiment specimen sat in the corner screaming to be let die...Quote:
Originally Posted by 3dcandy
I think it is quite a bit interesting.... maybe they win over Nintendo as well? who knows.
"it is reasonable to assume that AMD is at least pondering over moving its Ryzen processors to a hybrid core architecture – like Intel's Alder Lake – in the coming months / years."
- If the patent was filed nearly two years ago it is safe to assume it is already finished and ready to go, I think AMD will have a big/little core CPU in the next generation of chips and laptop or APU chips are a good bet I suspect.
Same goes for the earlier comment (not yours) about swapping workloads from, CPU into a GPU. I presume by that they meant something like migrating graphics from IGP to GPU and back as required, not moving an instruction stream from CPU to a GPU with a completely different programming model let alone instruction set?Quote:
Originally Posted by 3dcandy
If it's mathematical calculations or vectorised math that would normally (on a CPU) be parsed by the ALU, would the system be able to transpose that into an GPU element??Quote:
Originally Posted by DanceswithUnix
As I presume it's my comment you're referring to.
It was your comment, sorry that was lazy of me not to look that up!Quote:
Originally Posted by Tabbykatze
All things are possible; but can you translate the work well enough to make use of the facilities of the GPU such that it would go faster without using so much silicon that you would be better off putting that silicon to use elsewhere?
If the GPU was basically a Larrabee setup using AVX for rendering then it would be easier, but probably still not actually that useful and we know how well Larrabee ended.
I do agree that they are alien architectures and without the code paths being optimised, it could be trying to shovel a single threaded task through a parallelised architecture (for example)Quote:
Originally Posted by DanceswithUnix
But then again, we are looking at this traditionally, I mean Intel is developing the OneAPI which will allow hardware agnostic development so if you write some software that does a lot of math, it will (see: should) work on CPU, GPU, defined ASIC, etc but will just work at different speeds. Granted the OneAPI is way way above this kind of hardware thread management. Maybe AMD are trying to take it a step lower and do high level observation on thread actions.
That sounds well into the realm of dynamic code translation, which is complex enough that it has always been done in software.Quote:
Originally Posted by Tabbykatze
BTW, I think you are mixing up ASIC (application specific integrated circuit; which pulls in network switch chips, modems, all sorts of stuff) and custom/specialised cpu instruction extensions.
... another thought on this, I wonder what is in this patent that isn't already done by Nvidia in some of their old Tegra parts which ISTR had a transparent thread migration as part of its clock scaling.
As I understand it, correct me if I'm wrong, but AVX2/3 etc are Instruction Sets but on Intel they are colloquially utilised on an ASIC specialised for running those specific instruction sets. From what I have learnt, an ASIC is general term applied to specialised silicon that is designed to perform the function or within a scope of something highly repeatable. i.e. the AES-NI is an instruction set that is normally coupled with the extra hardware on the CPU designed to accelerate portions/all of the instruction set.Quote:
Originally Posted by DanceswithUnix
I admit that I am being loose with the utilisation of the ASIC term but I don't believe I am mixing up the two and am aware that specialised instructions and specialised silicon occupy very different areas (but as mentioned above, specialised instructions and specialised hardware seem to be codeveloped often).
We've seen ridiculous advancements in code compilation, operation and running in the past 40 years, maybe this is the next advancement? Pure conjecture, I don't think AMD have cracked that walnut but is an interesting thought experiment.Quote:
Originally Posted by DanceswithUnix
It isn't a bolted on co-processor though. AVX is built right into the heart of the cpu core, very tightly coupled. It is part of the entire CPU, and CPUs are usually considered general purpose rather than application specific.Quote:
Originally Posted by Tabbykatze
I think that is being pretty liberal with the ASIC vs CPU discussion. Whether it is tightly integrated or not doesn't make it not an application specific integrated circuit, it just adds an extra integrated in front of of the ASIC abbreviation :PQuote:
Originally Posted by DanceswithUnix
But then again, what's become the "minimum expectation" of a CPU has grown over time, maybe an ASIC like the AVX accelerators do become part of the minimum expectation of a CPU makeup.