World's Smallest Gigabit Memory

Matrix claim to have made the smallest Gigabit memory chip.

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Hybrid scaling is in essence the option to not scale parts of parts of memory design while other parts are scaled. It is the combination of different process geometries within the layers of a 3-D circuit, Matrix said. The use of hybrid scaling in the 1-Gbit ROM features logic layers manufactured at 150-nanometer rules with subsequent memory layers at 130-nm rules. Matrix claimed it was able to attain this using existing 180-nm toolsets.

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Yes, very nice. Read more over a EE Times.