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Thread: Reverse Hyper Threading.. Hmnn! Interesting!

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    Senior Member sawyen's Avatar
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    Reverse Hyper Threading.. Hmnn! Interesting!

    Read a release news from Bit-Tech about the possibility of a reverse multi-threading code for multi-cored CPUs by AMD..

    Apparently its all about making multiple cores work as ONE core, possibly boosting single threaded performance to counter Conroe.. all is still speculations.. Have a trip to bit-tech and have a read.. its in one of the sidebars..

    If the tandem sync between separate cores can work constructively, I have a feeling the K8 architechture may not be out of the race yet against the Conroe.. even a 50% boost would have been enough to slap Conroe..
    Me want Ultrabook


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    HEXUS.social member Agent's Avatar
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    I dont belive Conroe is all its made out to be, but time will tell.

    Its an interesting concept, and one i hope that takes off. This has been around the net for a bit though, AMD are being pretty quiet about it.
    Could be the hidden gun that AM2 has maybe ?
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    Senior Member sawyen's Avatar
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    agreed.. could very well be... or probably a universal driver fix for all X2 related processors.

    Get the drivers, flip the switch and voila... cant hardly wait..
    Me want Ultrabook


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    Banhammer in peace PeterB kalniel's Avatar
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    Hehe a universal driver fix would be absolutely killer, but I bet it's something they'd only release to help sell newer chips.

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    I am inclined to believe Conroe's claim for now. I don't think it is in Intel's interest to lie TBH. The average Joe will buy their chip, and they are now trying to get market share back from the enthusiasts - who most likely will look at independant test result before taking the plunge. To lie about the results will really shoot their credibility, which they don't want.

    Back on topic.. It is an interesting idea. But isn't it a bit of a hack (hyperthreading style)? Simply running the OS and a few apps would result in having a lot of threads needing attention. Would the overall system performance really increase using this method? I suppose it would help if you run a single benchmark, or if one process is a lot more demanding than others...

    Doesn't look to be there in the early AM2 to be honest: http://www.anandtech.com/cpuchipsets...spx?i=2741&p=1 [nothing mentioned].
    Last edited by TooNice; 18-04-2006 at 03:37 PM.

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    Seething Cauldron of Hatred TheAnimus's Avatar
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    Oh dear, bit-trusted writing well again

    Basically this is a idea that has been arround since the dark ages of CISCs. Often called multi-dimension compliation, or multi-hull compilation, or parrallisation compilation (probably all spelt wrong, v dislexic day today sorry!)

    A CISC looks at code, it looks at instructions, and works out which ones it can do out of order.

    ie, if you have the code
    A = 1;
    B = 1;
    C = 0;
    Loop
    A = A + 10.2
    B = B * 3.5
    C = (A * 2) + B + C;
    A = C;
    endloop

    then its obvious some things can be done out of order.
    ie, A and B can both be calculated symultaniously.
    C can be split up too, A*2, and B+C can both be added symultaniously.

    Now the problem is that when you look at code in most programs its already been compiled in a manner to help the proccessor pipeling.

    It would be quite intresting to analyse popular programs to find out what actually could benefit from this, i wouldn't expect it to be that much.
    throw new ArgumentException (String, String, Exception)

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    not posting kempez's Avatar
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    I'm not sure that it would but I'd imagine in gaming and benchies it would push AMD ahead of Intel

    wonder if this would be at Hardware or software level??
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    Quote Originally Posted by hexah
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    Seething Cauldron of Hatred TheAnimus's Avatar
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    Hyperthreading isn't really a hack, whilst i didn't apreachate it much at the time i think it should of been a good wakeup call for developers to use multiproccessor designs.

    There are many parts of the CPU that aren't been used all the time, such as FLUs.
    The advantage of having hyperthreading means that two seperate proccesses can fight for resources, rather than only using one thread. The problem is that when I'm writing a program, the bit where all the CPU time is needed tends to be a lack of ALU or FLU resources. What i mean is, the un-used parts of the CPU aren't needed at all, hence why their un-used.

    Now what might be possible is some circumstances you need to share parts of the CPUs like the FLU. But Conroe seams to have enough of all these resources. Programmers need to be better, less lazy.
    throw new ArgumentException (String, String, Exception)

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    Quote Originally Posted by TheAnimus
    Oh dear, bit-trusted writing well again

    Basically this is a idea that has been arround since the dark ages of CISCs. Often called multi-dimension compliation, or multi-hull compilation, or parrallisation compilation (probably all spelt wrong, v dislexic day today sorry!)

    A CISC looks at code, it looks at instructions, and works out which ones it can do out of order.
    Well both AMD and Intel have been doing that for years. The A64 for instance has 3 ALUs and 3 FPUs (though they don't fully overlap). I guess they're reaching the limits of what you can stick in one chip and get working sensibly so they're looking to introduce an extra core instead.

    The problem with dual processor and HT chips is, for desktop and gaming users you rarely need multithreaded performance. Games, by their nature, are suited to single threaded execution. You need a lot of speed, but only in a single thread. Making them make use of multiple threads usefully is a lot more work, and degrades performance on single CPU machines. As yet very few people have dual or even HT machines for gaming so there's been little to no benefit for optimizing for that. It's a bit of a chicken and egg situation - gamers buy single CPU machines cos they're best for games, meaning no one has multi processor machines so there's no point making games for them.

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    Quote Originally Posted by TooNice
    I am inclined to believe Conroe's claim for now.
    We're getting some interesting perspective on Conroe, from the Journal of Pervasive 64-bit Computing. Such as this:

    The conclusion is: clock for clock, Athlon 64 will beat Conroe in real application environments that require a working set of larger than 4MB, or in other words, larger than Conroe's 4MB cache. This means in any real multi-tasking or server environment the Core architecture will be an underdog. Even worse, for Intel's shared cache architecture, cache thrashing is a distinct possibility under heavy loads.

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    Quote Originally Posted by Artic_Kid
    We're getting some interesting perspective on Conroe, from the Journal of Pervasive 64-bit Computing. Such as this:

    The conclusion is: clock for clock, Athlon 64 will beat Conroe in real application environments that require a working set of larger than 4MB, or in other words, larger than Conroe's 4MB cache. This means in any real multi-tasking or server environment the Core architecture will be an underdog. Even worse, for Intel's shared cache architecture, cache thrashing is a distinct possibility under heavy loads.
    I assume this is down to the fact AMD has an onboard mem controller and thus much faster access to the RAM than intel does.

    Sounds good for AMD until you realise that most applications* in show completely minimal gains going from a 512k cache to a 1mb cache which would imply that the 512k cache is not that overstretched. Then start talking about saturating a cache of 4mb

    *completely true of games which im sure a good portion of us are mostly interested

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    Quote Originally Posted by [DW]Cougho
    Sounds good for AMD until you realise that most applications* show completely minimal gains going from a 512k cache to a 1mb cache which would imply that the 512k cache is not that overstretched. Then start talking about saturating a cache of 4mb
    Keep in mind the AMD dual-core cache is kept separate for each core. Two 1 MB caches, for a total of 2MB. The Conroe cache is twice as big (or 4MB) and is shared between the two cores (so there is the likelihood of cache thrashing if both cores experience a load).

    It's not obvious (to me, at this point) whether Conroe is better. I'm cautious about the Conroe-hype currently going around. A mere doubling of the AMD cache would make it the same total cache size as Conroe. The website I gave (above) seems to offer some good insight into the Conroe/AMD controversy.

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    Quote Originally Posted by [DW]Cougho
    I assume this is down to the fact AMD has an onboard mem controller and thus much faster access to the RAM than intel does.

    Sounds good for AMD until you realise that most applications* in show completely minimal gains going from a 512k cache to a 1mb cache which would imply that the 512k cache is not that overstretched. Then start talking about saturating a cache of 4mb

    *completely true of games which im sure a good portion of us are mostly interested
    Or it could imply that the working set far exceeds the cache size - increasing cache from 512KB to 1MB while working on a 100MB of data won't make that much odds in many access patterns.

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    Banhammer in peace PeterB kalniel's Avatar
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    In order to take advantage of this capability, wouldn't developers pretty much have to compile code with AMDs own compilers? Maybe there's some kind of reverse engineering that could be done, but surely at the expense of speed. If AMD compilers were required to get the most out of this, how would they get developers to use them? I've never seen seperate binaries for AMD before, and most things seem to end up being compiled through intel compilers anyway.

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    Quote Originally Posted by Butcher
    Or it could imply that the working set far exceeds the cache size - increasing cache from 512KB to 1MB while working on a 100MB of data won't make that much odds in many access patterns.
    ahh true. I still await conroe with baited breath though, especially since the yonahs that are out there are doing fantastically well.

    Just got to wait for unbiased reviews from the usual suspects.

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    apparentely intel are working on a similar tech which they are calling mitosis

    i have no idea what it is. link below to article on it

    http://www.intel.com/technology/maga...ading-1205.htm

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