SK hynix launches industry's first DDR5 DRAM modules

[HEXUS]

Next gen RAM has 4,800-5,600Mbps transfer rates, built-in ECC, operates at 1.1V.

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[Duckboy79]

Still on DDR3! I couldn't bring myself to upgrade until the new AMD Cpu's are out, that is some seriously crazy speeds tho!

[BigBANGerZ]

need to know what the timings and latency are, simply being fast DDR5 doesn't say if its better than DDR4 unfortunately it could well be the early modules perform slower in practice but I'm sure it will get there eventually

[DanceswithUnix]

Integrated ECC? makes it sounds like that is going to be standard, but I'm guessing that will be an option usually switched off.

[Duckboy79]

need to know what the timings and latency are, simply being fast DDR5 doesn't say if its better than DDR4 unfortunately it could well be the early modules perform slower in practice but I'm sure it will get there eventually

True this, I get very confused about CAS timings etc, I think it's time for me to have a good read about it, anyone know any really good simple reads on this?

Edit: found one!

[badass]

Integrated ECC? makes it sounds like that is going to be standard, but I'm guessing that will be an option usually switched off.

The ECC can only do 1 bit corrections IIRC and it's purely internal. I.e. If errors occur between the "Stick" and the CPU it will not be detected/corrected. The server grade ECC like in current DRAM includes ECC on the CPU Memory controller as well. I can't remember if it can correct more than 1 bit errors but it certainly can detect more than 1 bit errors.

[badass]

True this, I get very confused about CAS timings etc, I think it's time for me to have a good read about it, anyone know any really good simple reads on this?

Edit: found one!

I don't know about simple reads but the main takeaways are:

Any latencies quotes are always in cycles for memory. So comparing memory with a CAS latency of 12 and a spec of 1600 MT/Sec to memory with a CAS latency of 24 and a spec of 3200 MT/sec means they have identical latency.

Next: Latencies haven't meaningfully changed in absolute terms for over 10 years
Finally: For home computer/gaming use, latencies are completely irrelevant unless you are into comparing bar graphs with each other. Subjectively, you will not be able to see the difference between worst latencies available and best latencies available on the user experience. Memory speed could affect the experience, particularly if using integrated graphics.

[DanceswithUnix]

The ECC can only do 1 bit corrections IIRC and it's purely internal. I.e. If errors occur between the "Stick" and the CPU it will not be detected/corrected. The server grade ECC like in current DRAM includes ECC on the CPU Memory controller as well. I can't remember if it can correct more than 1 bit errors but it certainly can detect more than 1 bit errors.

Yep, this work machine can correct 1 bit errors and detect 2 bit errors, that's pretty standard for a memory controller. If the ram chip can correct errors, I'm not sure what extra the memory controller could add if the ddr link has integrity checking on it (which ISTR it has).

Just that Intel likes to turn that stuff off unless you buy the Xeon branded part. I can't imagine them wanting to give anything away. Though there is the whole MCE reporting system, though my home server with an Asrock board, 3600 CPU and a Centos OS install any memory errors aren't logged anyway, just silently fixed.