News - Intel Haswell-E prices and launch slides leaked

[kalniel]

Indeed....what makes it worse is that they keep changing the socket. By all means release a CPU that is merely 5% faster.....but when you kill off compatible motherboards doing it? Very sly.
At the current rate, my 2 Ivy chips will last until their motherboards die.

Can your motherboards take DDR4?

The Core i7 5820K is limited to 28 PCI-E lanes unlike higher end Haswell R SKUs it seems.

Which is still significantly more than the desktop Haswell. For me, it's about the sweetspot.

[CAT-THE-FIFTH]

Which is still significantly more than the desktop Haswell. For me, it's about the sweetspot.

Looking at some of the more enthusiast forums with people running more than one high end card,it seems the Core i7 5820K is might be avoided,as it means bandwidth is the same as the cheaper consumer platform. You cannot run two high end cards at PCI-E 3.0 16X,and it appears the slot assignment is 16X,8X and 4X too.

It would not surprise me if Broadwell or Skylake increase the amount of PCI-E 3.0 lanes on the consumer platform.

Edit!!

IB-E has 40 PCI-E 3.0 lanes available down to the cheapest SKU.

LOL at Intel product segmentation.

At least offer 32 lanes.

[kalniel]

Looking at some of the more enthusiast forums with people running more than one high end card,it seems the Core i7 5820K is might be avoided,as it means bandwidth is the same as the cheaper consumer platform. You cannot run two high end cards at PCI-E 3.0 16X

You don't need to run two cards in 16x at the moment, and 28 lanes is still way more than the consumer platform which only has 16 along with some PCI-E 2.0.

With the 5820 you might run 2 cards at 8x (plenty), an SSD at 4x and you'd still have another 8 lanes of PCI-E 3.0 left for fast peripherals.

[CAT-THE-FIFTH]

You don't need to run two cards in 16x at the moment, and 28 lanes is still way more than the consumer platform which only has 16 along with some PCI-E 2.0.

With the 5820 you might run 2 cards at 8x (plenty), an SSD at 4x and you'd still have another 8 lanes of PCI-E 3.0 left for fast peripherals.

Yes but the problem is that companies like AMD and Nvidia are moving towards PCI-E mediated Crossfire and SLI,which complicates things.

Plus when you add the cost of DDR4 into the mix,it makes the saving over IB-E six core setups probably non-existent and for that kind of outlay I don't think 28 lanes is enough. The previous generation had 40 and this is more stupid Intel product segmentation.

[shaithis]

Can your motherboards take DDR4?

Nope and cannot see much benefit for it anytime soon....apart from APUs, it's going to make minimum difference in most tasks just like every other version of DDR has. The main reason behind the push to DDR4 is the same as always, server platforms.

[CampGareth]

So for graphics cards the extra lanes aren't that helpful, fine. What about niche users though? I'm planning to upgrade my current NAS (just a standard Ivybridge board atm) with a 36 port SAS card and a 40gbit infiniband card, each of those devices eats 8 pcie 2 lanes out of the 20 I have available. (can't magic up more lanes because cpu is 3.0 and cards 2.0, and 3.0 cards cost many times more). That leaves just about enough lanes to keep the on-board network and sata ports running.

The other end isn't too crazy, just another infiniband card and a couple of graphics cards, but that alone will use all the pcie lanes of a standard CPU, leaving nothing in case I add a pcie ssd.

[kalniel]

(can't magic up more lanes because cpu is 3.0 and cards 2.0, and 3.0 cards cost many times more).

PCI-E 2.0 cards are fully compatible with PCI-E 3.0 lanes, so you should be able to run off spare CPU attached slots no problem.

[CampGareth]

PCI-E 2.0 cards are fully compatible with PCI-E 3.0 lanes, so you should be able to run off spare CPU attached slots no problem.

Mmm, I just can't magically have 40 2.0 lanes instead of 20 3.0s is what I meant. So that forces me to use CPUs with a few more lanes of 3.0.

[FrenchGeek]

Intel is coming soon with Powerfull CPUs and to Build up a Machine gonna be expensive i think !

[BrandonP]

Doubt its worth getting straight away........

[aidanjt]

In 12 years they have moved from the quite ****ty (ie NetBurst) single core Pentium 4 series which topped out at a clock speed around 3.7GHz to the new 16 thread i7 5xxxx series which tops out at a clock speed around 3.7GHz.

What?
3.7GHz twelve years ago vs 3.7GHz now, in 2014?
The maximum official CPU clock speeds have remained pretty much unchanged for over a decade. Even if you allow for an overclock to 4.7GHz, the maximum clock speed generally achievable on a desktop PC has increased by about 25% over the past 12 years.

Wow... it's 2014 and there still exists people who think the megahurtz race is still relevant.

[keithwalton]

DDR4-2133 is a lot faster than DDR3-1600 in fact it's as fast as DDR3 ever officially went. I suspect a 6 core chip wont notice the difference but it may help feed an 8 core cpu.

In terms of pci-e lanes the low end chip is just a cost cutting measure and that the top end chip is just status quo.

It could start to be a bottleneck at 4k resolutions as it'll need to shift a lot more data across the bus.

[kalniel]

DDR4-2133 is a lot faster than DDR3-1600 in fact it's as fast as DDR3 ever officially went.

Define 'fast'.. It's actually slower to respond than DDR3-1600, so if by 'fast' you mean less responsive, then sure. You need to get to about 3000mhz for DDR4 to be as quick as typical DDR3-1600.

[ecat]

Wow... it's 2014 and there still exists people who think the megahurtz race is still relevant.

tehe.

After over a decade of multi-core on the desktop and over sixty (yes, 60) years of research into practical multi-threaded implementation of general, ie not explicitly suited to parallel implementation, sw algorithms we live in a world where most software cannot take full advantage of multi-core cpus.

The benefits of going from 4 core to 8 core are circumstantial. The benefits of a 100% increase in instruction throughput apply all sw.

Instruction throughput is IPC * clock speed.

It's 2014, I think it is time for the next big jump in per-core throughput, for the sake of the PC market if nothing else

[aidanjt]

After over a decade of multi-core on the desktop and over sixty (yes, 60) years of research into practical multi-threaded implementation of general, ie not explicitly suited to parallel implementation, sw algorithms we live in a world where most software cannot take full advantage of multi-core cpus.

Aside from problems that are heavily procedural, most applications which sees a tangible gain from threaded programming, has been optimised as such. And there's no actual consumer single threaded application that comes to mind that's seriously held back due to a single core not able to do better than the turbo boost clock. It mightn't bench as well as a 10.2jigahurtz monster for that fringe application nobody uses, might have, but in everything else the current CPUs clears the floor. And that's to say nothing of the added gains from the new SIMD and other extensions added since the P4 room heaters. Even with every other core tied behind its back, a single devil's canyon core makes an utter embarrassment out of the prescott.

It's 2014, I think it is time for the next big jump in per-core throughput, for the sake of the PC market if nothing else

Which they'll carry on doing by the more efficient means of microarcitecture optimisation. Not by winding up clocks into transistor melting frequencies.

Again, I'm completely flabbergasted that this still needs to be explained to people in 2014.