AMD spills more details on HBM memory

[zaph0d]

There's no reason why you can't have HSA HBM on-chip and an additional DDR3/4 controller with sufficient slots for extra capacity.
Cpu's have 3-4 levels of Cache, then Ram and finally Virtual-Ram in order of speed and potential capacity.
Why not have Cache > HBM > HSA-Conventional Memory (if capacity needed/attached) > Virtual.
This would prove especially useful if DX-12 is completely agnostic towards graphics cards as the APU could be hooked up to the display, do all the rendering until it's performance/thermal limits are close then power up an AiB Graphics card from Vendor 1, 2 or both and have them power up in series as load requires.

[DanceswithUnix]

There's no reason why you can't have HSA HBM on-chip and an additional DDR3/4 controller with sufficient slots for extra capacity.
Cpu's have 3-4 levels of Cache, then Ram and finally Virtual-Ram in order of speed and potential capacity.
Why not have Cache > HBM > HSA-Conventional Memory (if capacity needed/attached) > Virtual.
This would prove especially useful if DX-12 is completely agnostic towards graphics cards as the APU could be hooked up to the display, do all the rendering until it's performance/thermal limits are close then power up an AiB Graphics card from Vendor 1, 2 or both and have them power up in series as load requires.

That memory layout would mean the HBM would act as a cache to the external ram, so if you buy a 4GB cpu and then add 8GB of external RAM, you only see 8GB. Most customers wouldn't be OK with that. So you have to run it alongside, but that gives you a really weird non uniform memory layout. Ask Nvidia about their 3.5+0.5GB different speed memory regions to see how popular that is.

So, if you run HBM in an APU and then add external RAM, then the best use would be to use HBM for graphics and DDR for the CPU much like a current PC.

[GuidoLS]

There's no might or maybe - the 390 is going to be a 4gb card.

The reason for the 4GB restriction for the company's upcoming GPU is due to the first-generation HBM design. HBM uses stacked memory chips along with a silicon interposer and through-silicon-vias (an interconnect that runs through the chip from top to bottom) in order to move the DRAM closer to the GPU. This shortens the traces, allowing for increased bandwidth and lower power consumption. Currently, those chips can only be stacked four dies high. With each die limited to 2Gbit, each stack is one gigabyte. AMD's current design only allows for four stacks around the GPU, limiting the system to four gigabytes.

Once they figure out how to either stuff more memory around the GPU, or they can figure out how to incorporate Hynix' double stacks without sending the average enthusiast to the poor house (yes, it would be more expensive, by about 400%, over anything else out there, including the Titan, to use the newest generation) then maybe we'll see 6 and 8gb cards. But I'm still waiting to see an actual, functional 390, let alone the anything else.

It's all vapor until it's running.

Source

[Xlucine]

I'm still not sure. We have seen what happens to an APU when the RAM bandwidth limitation is pretty much removed (PS4) and the difference isn't night and day. PS4 uses GDDR5 and has more streams, yet is only slightly faster than the XB1 with DDR3 RAM.

My hope for this tech is probably pie in the sky: Move RAM from the GPU to the system and then enable HSA on non-APU systems. I.e. a universal system-wide memory architecture.

Depending on the cost of the HBM slice, a HBM GPU-cache might end up saving money overall since you could get away with cheaper system RAM. I admit it's very unlikely 1GB of HBM + interposer would sell for less than the £20 price difference between 8GB of fast and slow RAM, but it'd be nice to see in the future

[Corky34]

Remember when Nvidia had the issue with GPU solder joints on laptop gpu's failing over time. Something in the back of my head is telling me HBM may have similar problems down the line.
Hope not but I'm wary tbh.

I was thinking the same thing but i guess there's something more than just air between the layers, something to prevent the solder bumps from breaking down over time.

[kalniel]

I was thinking the same thing but i guess there's something more than just air between the layers, something to prevent the solder bumps from breaking down over time.

The issue nVidia had was at the interface of two different materials, so thermal cycling caused different expansion/contraction rates. All the layers here are the same material, and the interposer is also the same material, so there should be no issue.

[CAT-THE-FIFTH]

There's no might or maybe - the 390 is going to be a 4gb card.



Once they figure out how to either stuff more memory around the GPU, or they can figure out how to incorporate Hynix' double stacks without sending the average enthusiast to the poor house (yes, it would be more expensive, by about 400%, over anything else out there, including the Titan, to use the newest generation) then maybe we'll see 6 and 8gb cards. But I'm still waiting to see an actual, functional 390, let alone the anything else.

It's all vapor until it's running.

Source

Where is the slide saying its only 4GB - is it more assumption by the tech press reported as fact? It would seem really weird especially as Fiji will be the basis of the AMD compute cards which generally ship with decent amounts of VRAM.

Previous rumours indicated the use of Dual Link Interposers to get over the limitations of first generation HBM.

[Corky34]

The issue nVidia had was at the interface of two different materials, so thermal cycling caused different expansion/contraction rates. All the layers here are the same material, and the interposer is also the same material, so there should be no issue.

Isn't that the same situation with HBM?
I.e silicon interposer/layers connected by copper and solder.

Not that I think it will be an issue it's just I would be interested to know what materiel is used between the layers and interposer, or what materiel surrounds the through-silicon vias (TSVs) and microbumps.

[kalniel]

Isn't that the same situation with HBM?
I.e silicon interposer/layers connected by copper and solder.

The layer/interposer material being the same is the main thing so that they don't expand at different rates. The solder material is of course important, but no more so than usual, the fact that both sides it's connecting are the same material make matching thermal properties much easier.

[GuidoLS]

Where is the slide saying its only 4GB - is it more assumption by the tech press reported as fact? It would seem really weird especially as Fiji will be the basis of the AMD compute cards which generally ship with decent amounts of VRAM.

Previous rumours indicated the use of Dual Link Interposers to get over the limitations of first generation HBM.

Why show a slide when

"You're not limited in this world to any number of stacks, but from a capacity point of view, this generation-one HBM, each DRAM is a two-gigabit DRAM, so yeah, if you have four stacks you're limited to four gigabytes. You could build things with more stacks, you could build things with less stacks. Capacity of the frame buffer is just one of our concerns. There are many things you can do to utilise that capacity better. So if you have four stacks you're limited to four [gigabytes], but we don't really view that as a performance limitation from an AMD perspective."

"If you actually look at frame buffers and how efficient they are and how efficient the drivers are at managing capacities across the resolutions, you'll find that there's a lot that can be done. We do not see 4GB as a limitation that would cause performance bottlenecks. We just need to do a better job managing the capacities. We were getting free capacity, because with [GDDR5] in order to get more bandwidth we needed to make the memory system wider, so the capacities were increasing. As engineers, we always focus on where the bottleneck is. If you're getting capacity, you don't put as much effort into better utilising that capacity. 4GB is more than sufficient. We've had to go do a little bit of investment in order to better utilise the frame buffer, but we're not really seeing a frame buffer capacity [problem]. You'll be blown away by how much [capacity] is wasted."

Could be wrong, but that, to me, holds a little more weight than a slide, many of which have been shown to be outright fakes here lately.

Source

[ZaO]

Impressive looking numbers n stuff. But, who cares without plenty of reliable benchies I am very much looking forward to them though.. I hope it's a massive jump, as hardware seems to have progressed pretty slowly since 2011..

[CAT-THE-FIFTH]

Why show a slide when



Could be wrong, but that, to me, holds a little more weight than a slide, many of which have been shown to be outright fakes here lately.

Source

OK,fair enough but it would seem weird to launch a professional card with only 4GB of VRAM,especially since Fiji will be a dual use GPU like Tahiti. Unless,OFC AMD has done something funky.

[MercutioUK]

My... graphics card related itch is telling me this will be a huge card for AMD.

Something like the Radeon 9800pro was back in the day.

[kalniel]

My... graphics card related itch is telling me this will be a huge card for AMD.

Something like the Radeon 9800pro was back in the day.

Without a change in node size, I doubt it will be. But we'll see.

[shaithis]

My... graphics card related itch is telling me this will be a huge card for AMD.

No, it's quite a small card actually