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Thread: Nvidia reveals more about Pascal at Japanese GTC

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    Nvidia reveals more about Pascal at Japanese GTC

    Products featuring the Pascal GPU will start to ship in volume next year.
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    Re: Nvidia reveals more about Pascal at Japanese GTC

    NV..LINK...3D MEMORY...yawning...GDDR5 is still very fast the only problem is the under performing cores. Lets see if the next fastest CUDA core will beat the Fiji core with its 4096 Shading units that currently beats any core made by man in floating point math performance

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    Re: Nvidia reveals more about Pascal at Japanese GTC

    Quote Originally Posted by lumireleon View Post
    NV..LINK...3D MEMORY...yawning...GDDR5 is still very fast the only problem is the under performing cores.
    That's not what AMD found.

    Lets see if the next fastest CUDA core will beat the Fiji core with its 4096 Shading units that currently beats any core made by man in floating point math performance
    You might want to revise that statement (2.91TFlops DP for Tesla K80, 2.62TFlops DP for Firepro S9170. The best fiji can manage is 0.5)

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    Re: Nvidia reveals more about Pascal at Japanese GTC

    What a piece of fluff

    Wish there was some real information there.
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    Re: Nvidia reveals more about Pascal at Japanese GTC

    Quote Originally Posted by lumireleon View Post
    NV..LINK...3D MEMORY...yawning...GDDR5 is still very fast the only problem is the under performing cores. Lets see if the next fastest CUDA core will beat the Fiji core with its 4096 Shading units that currently beats any core made by man in floating point math performance
    Not sure if you're being serious or if you truly think the only job a GPU does is floating point maths?
    Also if GDDR5 is still fast enough then how do explain the advantage that AMD gain at higher resolutions when using HBM (technically the same thing as 3D Memory) on their Fury cards?

    On a more serious note, does anyone know if NVLink is going to be a consumer grade interconnect or is it only going to be limited to HPC and SLI?

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    Re: Nvidia reveals more about Pascal at Japanese GTC

    Quote Originally Posted by Corky34 View Post
    Not sure if you're being serious or if you truly think the only job a GPU does is floating point maths?
    Also if GDDR5 is still fast enough then how do explain the advantage that AMD gain at higher resolutions when using HBM (technically the same thing as 3D Memory) on their Fury cards?

    On a more serious note, does anyone know if NVLink is going to be a consumer grade interconnect or is it only going to be limited to HPC and SLI?
    Are you thinking in terms of an external dock/thunderbolt competitor? At the moment I get the impression it's not all that different to AMD/MS's existing DMA/move engine type stuff.

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    Re: Nvidia reveals more about Pascal at Japanese GTC

    I was thinking in terms of a faster bus (more bandwidth) between the GPU and the rest of the system (CPU & RAM), that's unless I've totally misunderstood what NVLink is, isn't it a replacement/substitute for PCIe.

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    Re: Nvidia reveals more about Pascal at Japanese GTC

    We want real world test before I believe the hype

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    Re: Nvidia reveals more about Pascal at Japanese GTC

    Earmarked for 2016? Pfft, i'm definitely not going to be one of the early adopter testers for that *new* technology. It just reeks fanciful thinking to me that looks amazing on paper but real world adoption is going to have the human factor smeared all over it.

    I'd rather see what AMD have learnt from HBM v1 and how they are going to push the envelope with v2

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    Re: Nvidia reveals more about Pascal at Japanese GTC

    Quote Originally Posted by Corky34 View Post
    I was thinking in terms of a faster bus (more bandwidth) between the GPU and the rest of the system (CPU & RAM), that's unless I've totally misunderstood what NVLink is, isn't it a replacement/substitute for PCIe.
    I guess so, I wasn't sure on the benefits for one card systems. For consumers I'd expect them to stick to PCI-E unless they are so sure of their add-in board dominance they can break away - so I'd expect something either piggy-backing PCI-E or physically routing between cards, but you're right in that at least one diagram shows the link between CPU and card as well.

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    Re: Nvidia reveals more about Pascal at Japanese GTC

    Quote Originally Posted by Tabbykatze View Post
    Earmarked for 2016? Pfft, i'm definitely not going to be one of the early adopter testers for that *new* technology. It just reeks fanciful thinking to me that looks amazing on paper but real world adoption is going to have the human factor smeared all over it.

    I'd rather see what AMD have learnt from HBM v1 and how they are going to push the envelope with v2
    For tech enthusiasts there sure are some misinformed people around, that *new* technology you speak of isn't new and it isn't fanciful thinking.
    And if your waiting for AMD to push the envelope with HBM2 your going to be sadly disappointed, HBM2 just increases the size of the chip from 2Gb per stack to 4Gb.

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    Re: Nvidia reveals more about Pascal at Japanese GTC

    Nvlink is new as in commercially available but we can debate the semantics of the hardware release schedules and development cycles another time.

    Hbm v2 isnt just about size of the 3D chip, its also about the improvements of the interaction between the memory and the core itself and increasing/enhancing its throughout.

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    Re: Nvidia reveals more about Pascal at Japanese GTC

    So what would these "improvements of the interaction between the memory and the core itself and increasing/enhancing its throughout" be?

    Everything I've read about HBM2 says it's just a doubling up of what HBM1 is, and what Nvidia is calling 3D memory is effectively HBM2, I'd be very interested in more details though if you could provide some links showing that's not the case.

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