Micron's GDDR6 offers twice the bandwidth of GDDR5

[abaxas]

Bring on the slightly cheaper 64bit/128bit cards.

[scaryjim]

... i could have sworn when HBM1 first came out that i read that HBM2 would basically be a 8 hi stack ...

HBM2 *can* be an 8-Hi stack, but each die in the stack has 4x the capacity of the original HBM1 dies (presumably due to improvements in the TSV manufacture, and maybe a smaller manufacturing node?), so you get 4GB 4-Hi stacks and 8GB 8-Hi stacks. AMD could theoretically do a Fury-style card with 32GB of VRAM; although if they reckon HBM1 had enough bandwidth for the 4096-shader implementation then 2 stacks of HBM2 would give the same bandwidth whilst offering either 8GB or 16GB of memory.

You know, I hadn't realised how game-changing HBM2 could be if it gets executed right. The Nano already has amazing perf/watt, but imagine shrinking it down to 14nm then cutting the memory interface in half, so it's driving two stacks of HBM2. Same shader count/clocks/bandwidth as the current nano, but in about half the space

[DanceswithUnix]

I thought about that, but DDR4 currently seems to be topping out at around 3.4Gbps, which leaves it 25% behind the GDDR5 used on mainstream cards, and 50% behind the top-end GDDR5. I reckon there could be space for all three, with DDR4 at the very low end, GDDR5 and GDDR6 filling the mid-range, and HBM2 in the higher mid-range upwards...?

True, but if the cost difference is enough it could make a 128 bit DDR4 card the same price as a 64 bit GDDR5 card.

Perhaps we could finally see a 384bit interface R9 380 so it can use DDR4.

You know, I hadn't realised how game-changing HBM2 could be if it gets executed right. The Nano already has amazing perf/watt, but imagine shrinking it down to 14nm then cutting the memory interface in half, so it's driving two stacks of HBM2. Same shader count/clocks/bandwidth as the current nano, but in about half the space

I think that is why AMD are saying it is the way forward. Desktop machines aren't where the volume is, and HBM seems to be superb for laptops.

[Sunderas]

This is just a pitstop.

[scaryjim]

... HBM seems to be superb for laptops.

FX-7600 class APU with 8GB of HBM2 in a single stack?

10x the theoretical bandwidth of dual channel DDR3-1600, plenty of memory for a laptop, all on a tiny little interposer. They've got the wherewithal to make it an SoC too, really cut down on the external BOM. The world is going mobile and integrated, and if AMD get it right they could be way ahead of the game...

[Biscuit]

FX-7600 class APU with 8GB of HBM2 in a single stack?

10x the theoretical bandwidth of dual channel DDR3-1600, plenty of memory for a laptop, all on a tiny little interposer. They've got the wherewithal to make it an SoC too, really cut down on the external BOM. The world is going mobile and integrated, and if AMD get it right they could be way ahead of the game...

Getting it right is one thing, getting companies to put it in devices is another.

[scaryjim]

Getting it right is one thing, getting companies to put it in devices is another.

Sadly, you're spot on with this...

EDIT:

just a couple more bits of idle musing: wonder what the minimum data rate is for HBM2 to function properly. A single stack has way more bandwidth than a mobile SoC needs, so I've started wondering if they could drop the data rate way down to save even more power. With an SoC like Beema/Mullins, even 1/10th of the bandwidth would be twice what's currently available. Would HBM2 run at 1/10th clock speed? How much power would it save if it did...?