AMD CEO Dr Lisa Su talks about Zen+ processor development

[Corky34]

Consider also that Samsung is pushing ahead to be first with 10nm in 2016, while Intel doesn't even have any plans yet.

Sure they do it just got delayed until 2017 (supposedly), probably around the same time Samsung have something more to show than just examples, they claim late 2016 but i wouldn't be surprised if that got knocked back a little.

[MRFS]

I've been an Intel fan for many years. Nevertheless, the DMI 3.0 link
on their latest chipsets is forcing a low ceiling on the max bandwidth
of high-performance solid-state storage. I think AMD would do well
to adopt of policy of embracing the NVMe standard, and at a minimum
begin to design AMD CPUs and matching chipsets that support a full
x16 lanes to NVMe RAID controllers with x16 edge connectors. The main
design reason is the symmetry that results from four U.2 ports @ x4 PCIe
lanes (4 @ x4 = x16), and the advantages that come with support for
all modern RAID levels. Remember also that PCIe 4.0's clock will
oscillate at 16 GHz, and upcoming non-volatile DRAM solutions promise
to require much higher upstream bandwidths.