EIST and C1E

[Premium]

I read that they throttle the CPU's vore and bus/clock based on system load, but according to cpu-z, they're changing my clock multiplier (&vcore) instead.
Is this how they actually work? Not changing the core bus speed, but the multiplier?

[arthurleung]

All electronic equipments are synchronized by clocks. The PCI bus, the FSB, the memory speed.

The PCI bus for example, need to follow the FSB, if the FSB increases, the PCI bus clock increases. Most components do not like a large change in clock speed. (A few Mhz is fine, but cutting to half and double it later is just asking for trouble).

Try downclocking from 280FSB right down to 200FSB, it will either crash or the safety will ask you to reboot for changes. PCI clock lock is standard on new motherboards, but that is not dynamic, so you can't adjust the ratio after booting up.

On the other hand, multiplier is a lot easier. Since CPU runs at a multiple of the FSB (or HTT), the only component that need to adjust the "clock" is the CPU (which it is designed to do so).

There is not much point to drop the FSB instead of the multiplier as you get less stability with the FSB, and you need a lot of programming / fault tolerance to keep the buses in sync.

And you always get higher performance with 200FSB*5 than 100FSB*10
[REAL LIFE EXAMPLE]
When no one taking the bus, the bus company reduce the number of buses running, NOT slowing down the buses
[/REAL LIFE EXAMPLE]

Your "core bus speed" would be referring to the HTT clock or the FSB clock.
CPU Clock = FSB Clock * CPU Multiplier. You don't need to change the FSB clock to change the CPU clock.

The Vcore is simply when the chip is running slow, it doesn't need a high voltage to keep it stable, and reducing the voltage can reduce power usage significantly.

[Agent]

Is this how they actually work? Not changing the core bus speed, but the multiplier?

Yep
It keeps the FSB at the same and changes what the chip multiplies it by.