Read more.Der8auer sliced up some CPUs and put them under a scanning electron microscope.
Read more.Der8auer sliced up some CPUs and put them under a scanning electron microscope.
Corky34 (22-09-2020)
It was a very interesting mini series of videos. The equipment they use is as facinating as the findings.
I love the fact the conculsion was that process node numbers are complete b******s and cant be used for comparing one manufactues process versus another.
Sumanji (25-09-2020)
I guess he didn't meant that, only that different manufactures node sizes are incomparable between manufacturers. its comparing apples to pears.
TDP is also funny in recent years, this is why Intel decided to use another metric for chip power usage, as no one trusted the TDP anymore.
Mind blown, something's wrong with me that the technology of looking at things that small gets my juices fizzing.
Not going on what wikichips worked out.
If anyone questions that maths I'll cry BTW as what i just quoted is lost on me.For example, for Intel’s 10nm there are 8 diffusion lines with a fin pitch of 34nm giving us a cell height of 272. With a poly pitch is 54nm, we get [4 transistors] / [272 nm x (3 * 54 nm)] = 90.78 MTr/mm² for the NAND2 gate. For the complex flip-flop, Intel’s optimizations results in around 121 MTr/mm². The total density is thus around 102.9 MTr/mm² (note that Intel reported 100.8 MTr/mm²).
I don't even understand what things like  and 'r' means.
Never seen anything like this before, really insightful! Still can’t believe intel are still on 14nm though!
These low geometries are hard to follow sometimes. I suppose  is a typo on a malformed website - it does not make sense. I do not see 'r' on its own, only as part of MTr, that I assume means Million Transistors. So you get Mtr/mm2 = Million Transistors per square millimeter.
If you want to get your head explode, a rough number for distance between atoms in many solid materials is 0.1nm or 0.2nm.
Great picture, Intel 14++ is likely be amd's 8nm or 7.5 nm
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