Read more.Geekbench results appear to show it has 20 threads, plus Xe graphics with 96 EUs.
Read more.Geekbench results appear to show it has 20 threads, plus Xe graphics with 96 EUs.
I am eager to see how this goes, especially with launching so soon after Rocket Lake. On the other hand I'm also curious how scheduling will work on Windows with asymmetric cores, particularly as I've heard rumours the small/big cores won't necessarily have identical instruction capability?
I'm expecting this to be a pretty problematic launch between windows scheduling, application optimisation and the general message that the CPUs are trying to convey.
Very weird, especially with two CPU launches in one year as well.
The Windows scheduler got a fairly major upgrade recently (again) to help with Ryzen and these Intel cpu's. Of course it's no good if you're back on pre-win 10 os's. I did recently help someone with a Win 7 Ryzen build and it's a big step down from Win 10 on a Ryzen and you can feel the scheduler and other things holding it back
Old puter - still good enuff till I save some pennies!
While Intel are actually pretty good with software like compilers, this is a very big ask.
Moving a process from, for example, an Atom-like core without AVX2 or whatever to a Core core with those instructions or vice versa doesn't seem like something the kernel could do without the application being aware: you've been moved, please re-interrogate the CPU to find out what capabilities you now have and restart yourself.
Yeah it's the AVX instructions I was thinking of myself, I'm not sure how they could reliably move tasks to the small cores without breaking things. Perhaps applications could be pinned to the large cores, but then you wonder what's the point in having the small cores?
Another thing, is I wonder how much of a difference this is really going to make on desktop. On mobile and perhaps even laptops where every Joule matters then this sort of system could work out, but I'm struggling to think how it would work on desktop where downclocked 'big' cores only take a few watts anyway and fall into the background of overall system power consumption. It's not that I'm not in favour of improving power efficiency on desktop, but there's plenty of other low-hanging fruit to improve desktop power consumption!
I should imagine there will be logic in the CPU to handle this. If it detects a specific instruction I imagine it will just pause and move the process over to the more functional core. I imagine from the application layer it will just look like 14 identical cores with CPU handling all the complexity.
It still feels like a step backwards this though. Why not just lower your main CPUs clock speed to save energy? It feels like intel are just grasping at straws to look relevant against Ryzen.
If I remember a previous article on this, if you have Big & Little cores enabled, AVX is just straight up disabled:
https://overclock3d.net/news/cpu_mai...uggests_leak/1Based on a slide from JZWSVIC over on the zhihu website (see below image), as uncovered through @9550pro on Twitter, we can see that Alder Lake's big CPU cores will lack AVX-512, Intel TSX-NI and FP16 support when the processor's little cores are enabled.
Basically, if you want a full featured desktop, just disable the little cores...
My understanding is the Win7 scheduler doesn't handle more than 4 cores well. It also doesn't really understand hyperthreading (or the AMD equivalent). Its not that it doesn't work - its just not very efficient - for example you really want to load up the real cores first, and only start using the extra hyperthreading ones once each real core is in use. Windows 7 would just pick which ever.
It's not that simple, you can't just move in-flight instructions like that. The first the CPU core will know of an incompatible instruction is when it hits the decoder and causes an error when it can't handle it. This is why applications use CPU dispatchers - they will query the CPU for its instruction capabilities and run an appropriate binary based on that. If the CPU responds that it is capable of AVX2, and then receives an AVX2 instruction it can't decode, you have problems.
I'm not for a moment suggesting Intel haven't planned for this, I'm just curious how they're going to solve it. It seems a bit daft if they just have to disable the small cores as Tabbykatze says?
That's kinda my thoughts - I don't know how much could be gained by doing this over just running big cores at lower clocks/voltages.
The issue isn't more cores, it's cores with different execution capabilities.
I noticed patches on linux for Alder Lake currently limit big and little cores to AVX2. Gracemont little cores do support AVX2. Perhaps that will be the near-term solution for Windows also.
The support of avx512 by a subset of core devices on Intel's oneAPI doesn't appear to me to be a big stretch vs running code on a GPU, so I could see Intel adding capabilities that get accessed in user specified device type.
Ahh yeah I've just read that article, seems the issue may be with AVX-512, TSX and FP16 - I guess that could be more workable (and they're far less applicable to desktop for now anyway). I'd made the assumption that AVX2 was also affected, but still wonder how much impact scheduling will have - I assume the AVX2 pipeline is much narrower on Gracemont vs the big cores?
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