Zen based APU with HBM to be AMD Carrizo successor

[HEXUS]

Reveals a paper co-authored by AMD Fellow and graphics engineer, Mike Mantor.

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[DemonHighwayman]

Interesting story but what a weird graphic with all its garlic and onions - whoosh, it went straight over my head.

[lumireleon]

cough cough coug Intel HD and nvidia the new trend is here: consumers who are poor (like me) can't afford laptops with a 960m or those with an intel HD IRIS graphics (which is slow by the way). Nvidia do not make CPU's while intel are not good with GPU's. APPLE and SAMSUNG will soon be going the AMD way. The next 3 years will be a windfall for AMD. SONY PS-5 with HBM...XBOX with HBM......

[robredz]

How do they square the shared memory circle, as in using system RAM will always be slower than dedicated VRAM.

[scaryjim]

... what a weird graphic with all its garlic and onions ...

You probably want to add a fairly large pinch of salt to those alliums...

[lumireleon]

a good APU GPU running on 2400mhz DDR4 will experience a jump in performance. If AMD will add an eDRAM just like intel IRIS to the mix will further improve bandwidth on cheap laptops/AIO. On the midrange laptops (~$800) they might add a 4GB HBM 2.0 to the APU.

[sykobee]

Those buses are merely internal APU buses for clever communication between the CPUs and GPUs within the APU in order to enabled HSA.

It looks like they're squaring the shared memory circle by putting a large HBM L4 cache on the APUs. The worst config (1 stack of HBM1) would give 1GB of L4 and 128GB/s of bandwidth, which would unlock the APU's GPU ability well. I feel that a two-stack, HBM2 solution is viable, so that could be 2/4 GB and 512GB/s (perhaps for the 2017 APUs).

Other AMD documents also note that they are looking at HBM stacks with embedded GPU logic in the base die - they think they can fit 12 CUs per stack at 14nm - but there are power consumption considerations.

[lumireleon]

HBM will be used by the GPU only. CPU will use DDR4. Maybe the cheaper versions of ZEN APU will use the shared DDR4 and possibly add an eDRAM to boost the GPU.

[Corky34]

It will? Is that just speculation or do we have something more concrete to go on.

[scaryjim]

HBM will be used by the GPU only.

Got any references for that? HBM is simply a form of volatile memory: there's no reason it has to be used only for GPUs...

... CPU will use DDR4. Maybe the cheaper versions of ZEN APU will use the shared DDR4 and possibly add an eDRAM to boost the GPU.

CPUs probably will continue to use DDR4 as system RAM on desktop and larger laptop systems, purely for the convenience of being able to expand/replace memory as required.

Why you think AMD will mess with eDRAM when they've already invested heavily in HBM is beyond me. The eDRAM in Crystalwell is 129MB and offers 100GB/s bandwidth. A single stack of HBM 1 offers 8x the cache capacity with higher bandwidth. The only issue might be latency, but istr reading some articles about HBM bandwidth actually being lower latency than DDR3/GDDR5 at least.

And of course in mobile, where upgradable memory is basically irrelevant, a single stack of HBM2 can provide up to 8GB of capacity at 256GB/s: that's 10x the bandwidth of a dual-channel DDR3-1600 interface. Even a quad channel DDR4 interface will struggle to get near that bandwidth. AFAIK there's no technical reason you couldn't run an APU with HBM as system RAM.

[DanceswithUnix]

Nvidia do not make CPU's while intel are not good with GPU's.

Nvidia don't make x86 cpus, but they not only make CPUs but they have their own 64 bit CPU core currently tuned for ARM V8 instructions. We just got an HP Chromebook which has a quad core Nvidia chip in it, and very nice it is too.

I think it is a real shame that Intel denied Nvida an x86 license, but then I think we know that Intel aren't in this game for the good of humanity.

[DanceswithUnix]

It looks like they're squaring the shared memory circle by putting a large HBM L4 cache on the APUs.

I don't see it being cache, 1GB of cache would need such a massive TLB to index into it you would be forced to have a second HBM stack to act as tag storage. So your 1GB of cache needs 2GB in total of HBM to work and you are back up to two busses working in parallel to get workable performance. At that point, it would probably be cheaper to have a single HBM2 stack of 4GB and for most people that is all the main memory they need. If you need to add more ram, then add DDR4 sticks and run the HBM2 as graphics ram.

[CAT-THE-FIFTH]

There could be more than one SKU though as I expect it to have a DDR4 memory controller too. Imagine if AMD made one SKU for laptops with 8GB of HBM2?? It would mean a much smaller package as not only is Carrizo an SOC and I expect its sucessor to be too,but it means one small package with the RAM included. The HBM2 could be use as a unified system memory for BOTH the CPU and GPU.

That would pretty much mean no need for a lower end GPU for AMD as even 640 to 800 GCN shaders with decent bandwith on-die would be easily GTX750/GTX750TI level performance,plus with the CPU getting decent bandwidth it would also probably help in that area too.

I would also expect a socketed desktop version where the DDR4 memory controller is used instead,since having to use an interposer for all versions probably increases the cost and complexity overall.

[lumireleon]

HBM is super fast and super efficient but its expensive for low end PC's at this period of time. I think certain versions of the Zen APU will not have HBM in-built but will just rely on DDR4. The issue of GDDR5 and HBM having low latency is negligible for general purpose PC's and consoles just like the PS4.

[DanceswithUnix]

I would also expect a socketed desktop version where the DDR4 memory controller is used instead,since having to use an interposer for all versions probably increases the cost and complexity overall.

But mass production drives cost down, so once you have the interposer for one part you may as well knock out all the parts with interposer and decide at the last minute at packaging which ones go BGA for laptops and which go into PGA/LGA for desktops. I expect trying to mount silicon intended for an interposer directly onto a flipchip carrier would be tricky, so possibly worth using the interposer to keep things simple just don't fit the HBM2 ram if you don't want it.

There is also the worry that if you give a no HBM option then laptop manufacturers will knock out machines with a single stick of DDR4 to go with the 1366x768 cheap panels and tiny batteries and keep the idea going that AMD based laptops aren't very good

So I would hope that the DDR4 interface is an option. You might get a pair of empty slots there if the HBM memory is enough for you, but people like the option to expand even if most never use it.

[lumireleon]

if AMD will have APU's with inbuilt 4GB/6GB/12GB/16GB shared HBM versions it will be a blessing for laptop manufacturers as it will reduce laptop size, increase efficiency and improve performance like crazy but what about costs? is a 4GB HBM APU nearly the same price to an APU with no HBM relying on DDR4 memory? consumers are sensitive to cost.