4GB is where the HBM tech is right now I thought. 8GB requires a new generation of memory and/or two cards. Could the 4096 shader/8GB mem be a dual chip implementation? One chip per eye in VR?
4GB is where the HBM tech is right now I thought. 8GB requires a new generation of memory and/or two cards. Could the 4096 shader/8GB mem be a dual chip implementation? One chip per eye in VR?
Supposed leaked benchmarks of the Titan X,GTX965 and the R9 390X:
http://wccftech.com/amd-r9-390x-nvid...nx-benchmarks/
Last edited by CAT-THE-FIFTH; 16-03-2015 at 01:01 AM.
http://www.fudzilla.com/news/process...m-even-cheaper
65W Athlon X4 now actually available.
I could see an 'Athlon' with a small IGP being a popular choice - for instance I have a few headless systems where you still need some graphics capability for initial setup but a discrete card would be pointless and the APUs are often not ideal either, offering either less CPU or overkill GPU.
Celerons don't give you much IGP performance but the convenience of *some* video output is nice to have.
That is why my home server uses an A8 6500. It is generally running headless, but using up a motherboard socket and extra power consumption with a plug in graphics card seemed silly. Also, to stop the thing having the fans go nuts when the kids lock up a Minecraft server I wanted a 65W APU
It just seems like such an obvious omission from their line-up. One counterargument would be that it's to up-sell customers to the full-fat APUs, but I suspect they'll just lose customers to Intel instead a lot of the time.
An big IGP can be handy to have for client use, but there are undeniably use cases where a huge IGP is just wasted. Athlons previously starting at 95W was also weird as you say.
It is (or at least was for Bobcat) a similar story on their cat core embedded APUs. The new PC Engines APU board uses a T40E processor but with the IGP switched off by the BIOS IIRC - I remember reading a developer complaining about how, even though there were IGP-disabled parts, the segmentation was crazy with either a single core or a massively higher TDP.
http://en.wikipedia.org/wiki/List_of...11.2C_40_nm.29
Edit: @abaxas: The AM1 platform is based around Kabini using the smaller cat cores. For a lot of uses it's great but some you still want the performance of the big cores, just no need for a big GPU. And like I say, that's pretty much what Celeron offers.
Some more 390X slides: http://videocardz.com/55146/amd-rade...ormance-leaked
They're referencing 'dual-link' as a way of supporting the 8GB. I wonder if it's some sort of mux/switch, so it gets more space without having to support more IO?
Titan X review just appeared on Anandtech with the subheading 'Big Maxwell'. Refreshed the page and it's gone again.
Edit: It was picked up and is still linked to by Google: http://www.anandtech.com/show/9059/t...titan-x-review (link just redirects to home page now).
Edit2: Someone managed to grab a screenshot: http://forums.anandtech.com/showthre...9#post37258229
Apparently it now lacks the trademark Titan FP64 performance as a few people including myself suspected, hence the Titan name is a bit weird; it seems more like a 980Ti which means we might not see a reduced cost version without the high FP64 performance - this is already 'it'.
Edit3: That still leaves the question of yield though. This is a huge die, so I wonder if it's still part-disabled for yield, and what they might be planning to do with overly-defective parts? As I also said, such a huge die is quite unusual for the relatively small top-end graphics market - the likes of GK110 and even Hawaii also have some (most?) volume in the HPC space.
Last edited by watercooled; 17-03-2015 at 05:21 PM.
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Why? Adding more memory per channel is nothing new, it's why we have different memory configurations of the same cards with the same bandwidth. The 970 was something else entirely.
Last edited by watercooled; 17-03-2015 at 05:52 PM.
We've yet to see how it works, hopefully it is just more memory 'per channel', but words like 'dual-link' imply they've had to use a trick to access more - it could well be that each link is connected to two 'bits' (not in the computer unit sense) of RAM, which might suggest bandwidth while accessing the whole 8GB would be on average halved (but you could access up to 4GB at a time in full bandwidth). Granted this isn't anything like to the scale of the 970 problems, and a 2048bit interface is still well in excess of the 384bit of nVidia's competition. But it's just ironic given the 970 problems.
It's really quite common, especially for cards with narrower busses, to add extra chips per 32-bit channel. And that's really not an issue - how many people worry about performance when adding extra DIMMs per channel to their CPU? Doesn't happen because, as I said, the bandwidth stays pretty much the same. You get less bandwidth than if those extra chips had their own IO pins, but still the *same* bandwidth as before, just more capacity.
The 970 debacle really isn't close to being the same thing.
Just thought of an analogy (I'm aware it's imperfect, but just to show what I'm on about). Think of HDDs in RAID0 - something like the 980 has eight drives in the array whereas the 970 has seven in the array and one running by itself - if you want to access something on that last disk it's going to be a heck of a lot slower than the big array. That last bit breaks the striping.
By adding chips to existing busses, it's more like using 4TB drives instead of 2TB ones.
Aaaaand Titan X NDA has passed. Anandtech link still works.
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