Number of registers effect system performance?

[Haiku32]

Sorry if this is in the wrong section, if so please move it.

"Explain why the number of registers in the central processor affects the fetch/execute cycle and hence, system performance."

Got asked to do this, and I'm wondering if it's a trick questions. I don't know a great deal about it tbh, but I thought there were different registers for specific purposes. So when doing the fetch/execute cycle, you only use certain registers. If there were 14 registers in one processor, and 16 registers in another, it wouldn't make any difference to the system performance when doing a fetch/execute cycle, would it, since the extra registers wouldn't be used during it.

I'm probably mistaken, and the internet doesn't seem to help me, anyone want to shed some light on this for me, thanks .

[ConTRo13R]

Are you a computer science student by any chance?

I'd think exactly the same as you though if i werent i may argue that more registers will increasethe latency times

[Haiku32]

Just higher computing in high school.

During a fetch/execute, the program counter, memory address, memory buffer and instruction registers, are used, right?

I don't understand how having more registers would affect it. Hmm...

[Steve]

Generally in a processor architecture you have a set of general purpose registers used to store results of arithmetic/FPU operations, and to read/write from/to memory. Sometimes you have special registers for certain operations (e.g. SSE, multiplication results, etc).

E.g. the following code uses three registers:

ADD R1 R2 R3     ;Add the contents of reg R2 and R3, store the result in R1
MUL R1 R1 R2     ;Multiply the contents of reg R1 and R2, store the result in R1

Now the bigger our program gets, the more registers we need, to the point where we run out, so we have to start reusing them (you can see I've cheated a bit and reused R1 already). But if we still need the contents of the register we want to reuse... well we can't reuse it until we store its current contents somewhere, like memory... which is SLOOOOOW.

So the more registers you have, the less often you're going to need to ship data off into the main memory, and execution will be much quicker.

There is a lot of other stuff to cover in this area, potentially, but that's beyond the scope of the question, I'd expect, and at 10pm I'm struggling to convey even this stuff

[TheAnimus]

generally speaking more register = fewer fetches.

However, given the distinction between the time of a fetch depending on where the page lies in caches makes this quite hard to actually debate on a modern CISC.

Also the more registers, the longer a context save takes, so the longer a switch takes.

Its always swings and roundabouts, which is why i always hated up in the air questions, i always find it far easier when in a specific, rather than generic context to think about things like this, which get quite complicated, quite quickly!

[Haiku32]

Ahhh, I get it now .

I guess it's just a bad question, we've been taught nothing about registers except that they are fast areas of memory located close to the processor.... that's it. I've had to research everything myself.

Thanks guys, helped alot!

[TAKTAK]

I've had to research everything myself.

Thanks guys, helped alot!

It's also worth baring in mind that practically everything that you learn in your computing lessons is outdated by 5 years or so due to the amount of time it takes to compile syllabuses, which becomes even more relevant when programming and being taught pascal (), and database management in MS Access (what large company uses Access for a database structure? [don't say MS ])... yeah, the basics are there... but it's not really fulfilling...

[Saracen]

generally speaking more register = fewer fetches.

However, given the distinction between the time of a fetch depending on where the page lies in caches makes this quite hard to actually debate on a modern CISC.

Also the more registers, the longer a context save takes, so the longer a switch takes.

Its always swings and roundabouts, which is why i always hated up in the air questions, i always find it far easier when in a specific, rather than generic context to think about things like this, which get quite complicated, quite quickly!

I completely agree, though I'd have added "up to a point" to your first line. It's not unlimited and, IIRC, not a linear function either.

There comes a point where other factors, like compiler optimisations determining what's getting put in registers, and cache design (and therefore hit rates), has more effect. So, of course, does the number of contexts, and the criteria you use to determine when to switch.

I'd guess though, from the fact that this is high school computing, and from the wording of the question, that it's probably not going as far as a statistical analysis of the diminishing marginal returns of registers depending on context switching states and criteria.

I agree it gets complicated right quick. Processor architecture and design is almost a form of technological philosophy, and kind-of akin to contemplating the existence of God or self, or the definition of infinity ..... in other words, it gives me a headache.

[Haiku32]

Haha, thanks guys, well the example that steve gave helped me out and that was the answer the teacher was looking for.

The coursework is so obsolete, you actually have to be able to format a floppy to pass. How ridiculous, considering none of the machines in school bar about 5 have floppy drives.

Just reading your post gives me a headache Saracen, nevermind understanding it .