16 cores?? Looks to me like 8 integer cores, sharing resources (more than just FP & cache) in pairs. It is a bold step, as AMD say that even in integer workloads the use of the second core of a module hits the first but just not as badly as hyper-threading does.
As for the FP part, ISTR when AMD kicked all this off FP units were 64 bits wide and so used multiple clocks to do big SSE instructions. AMD designed with 128 bit FP per core plus the ability for a core not doing FP to let the paired core use those units, giving what at the time was a monster 256 bit FP. Then they spent too long getting to market and now shared 256 bit looks a bit weak