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Thread: AMD - Piledriver chitchat

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    Re: AMD - Piledriver chitchat

    I've got a replacement 6800K coming (absolutely zero thanks to Scan) and I've got no board for it, so I was going to wait for an FM2+ one...

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    Re: AMD - Piledriver chitchat

    Personally I'd wait around for more FM2+ boards as they are right around the corner.

    Depends how likely you see yourself upgrading in general

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    Re: AMD - Piledriver chitchat

    Eventually I'd want to upgrade to Kaveri, so I don't want to spend out on an FM2 board now - waste of money, when this is for a backup/media PC. I don't mind waiting a little bit, but it's just going to be sitting here in the box.

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    Re: AMD - Piledriver chitchat

    Yeah exactly, either waste money on an FM2 board now or wait.

    Unless that board of course has all the features you want

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    Re: AMD - Piledriver chitchat

    It looks like Kaveri for desktop is arriving in Q4 2013:

    http://wccftech.com/amd-kaveri-apu-a...-reality-tech/

    More details of ARM based AMD SOCs start to appear:

    http://www.theregister.co.uk/2013/09...dmap_for_2014/

    It seems they are not only for servers.

    Interview with Bernd Lienhard,AMD general manager of client division global business units:

    http://www.pcr-online.biz/news/read/...of-tech/031842

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    Re: AMD - Piledriver chitchat

    would like to have a crack at AMD ARM and windows RT - might be fun

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    Re: AMD - Piledriver chitchat

    “Hierofalcon” CPU SoC

    64-bit ARM-based platform
    up to eight ARM Cortex™-A57 CPUs expected to run up to 2.0 GHz
    two 64-bit DDR3/4 channels with error correction code (ECC)
    10 Gb KR Ethernet and PCI-Express Gen 3
    enhanced security with support for ARM TrustZone® technology and a dedicated cryptographic security co-processor
    sampling in the second quarter of 2014 with production in the second half of the year.


    “Bald Eagle” APU/CPU

    R-series; x86-based embedded processor available as both an APU and CPU featuring up to four new “Steamroller” CPU cores within a 35W TDP.
    Graphics Core Next GPU architecture and HSA enhancements
    configurable TDP
    first half of 2014.


    “Steppe Eagle” APU SoC

    G-Series APU SoC platform
    enhanced “Jaguar” CPU core architecture and AMD Graphics Core Next GPU
    increased performance-per-watt both at a lower TDP
    above 2 GHz.
    first half of 2014.


    “Adelaar” discrete GPU

    Radeon GPU based on Graphics Core Next architecture
    2 GB of graphics memory.
    multi-display support
    DirectX® 11.1, OpenGL 4.2 and both Windows and Linux.
    first half of 2014 with seven years of planned supply availability as an MCM, mobile PCI express module (MXM) and standard PC graphics card2.


    http://semiaccurate.com/forums/showp...86&postcount=5

    It looks like Jaguar is getting another update soon.



    It seems Kaveri uses an HD9000 IGP.

    I wonder if this was part of the reason it is delayed?? So it is using second generation GCN2.

    Edit!!

    Airbus uses AMD embedded chips:

    http://fudzilla.com/home/item/32446-...in-aribus-a380
    Last edited by CAT-THE-FIFTH; 10-09-2013 at 04:19 PM.

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    Re: AMD - Piledriver chitchat

    Interesting roadmap. Interesting how, even from a 'political' perspective, how they place A57 above Jaguar. Although, I suppose they're comparing 2-4 vs 4-8 cores.

    They mention spread embedded production between GloFo and TSMC; I wonder if that applies to the console silicon too?

    Also, I wonder what the deal is with ARM-based HSA parts? Maybe they want to gain some familiarity with the CPU part before integrating everything.
    Last edited by watercooled; 10-09-2013 at 05:43 PM.

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    Re: AMD - Piledriver chitchat

    FM2+ board in stock;
    http://www.ginger6.com/new-asus-a88x...FYfMtAodRhwATQ
    No idea how reliable Ginger6 are, though.

    I see Ebuyer have a couple of Gigabyte FM2+ boards, including the Sniper, listed for pre-order, with a 20th October ETA

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    Re: AMD - Piledriver chitchat

    Ginger6 sounds like a site made up in someone's bedroom

    I asked ocuk and they said they're getting FM2+ boards before the end of the month.

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    Re: AMD - Piledriver chitchat

    BTW,I am just sniggering at the Anandtech forums again. More predictions on the end of ARM,Qualcomm,AMD,etc.
    Last edited by CAT-THE-FIFTH; 13-09-2013 at 02:14 PM.

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    Re: AMD - Piledriver chitchat


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    Re: AMD - Piledriver chitchat

    BTW,someone mentioned this interesting tidbit on another forum:

    http://www.notebookcheck.net/Review-....101677.0.html
    http://www.notebookcheck.net/Review-...k.93321.0.html

    The smaller A6-1450 based laptop is consuming more power than the A4-5000 based one with a larger screen!!

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    Re: AMD - Piledriver chitchat

    45W quad core Richland spotted.

    http://www.fudzilla.com/home/item/32...-tips-up-in-us

    Now I'm sure that these are carefully binned low leakage silicon (in the same way that the FX9xxx chips are carefully binned high leakage silicon), but I have to wonder if a standard 'K' part can have the multiplier set low to give a close enough feel and power consumption that most people wouldn't notice the difference. That A8 is nearly 50% turbo which I guess is the party piece of these 'T' parts, but not sure I want to pay more for that.

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    Re: AMD - Piledriver chitchat

    Frankly you could probably do it with the 65W parts - I don't think multipliers have been downward locked ever! You'd need to undervolt too, of course, but that shouldn't be too much of an issue. I reckon I knocked 10W - 15W off my Sempy when I had that downward locked and undervolted.

    Of course, if someone wants to donate a Richland A10 and a motherboard I'll be happy to do some investigation

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    Re: AMD - Piledriver chitchat

    There's usually a limit to how low the multiplier will go, but it should still be below that of the lowest-clocked part. Interestingly, the Celeron G440 is clocked as low as possible (1.6GHz) , so it forgoes Speedstep.

    I'd always be careful of affecting stability if you're using offset undervolting with modern CPUs, as the voltage/clock relationship isn't necessarily linear - e.g. taking 0.2v from the max clock might be completely stable, but 0.2v from the idle clocks, or some step in between, might cause instability. However, this would be hard to detect with load testing due to the fact the CPU will use the higher clocks when placed under load.

    You could always manually set the chip to the various clocks/voltages for testing but it wouldn't be quick. It's also worth noting that dropping voltage for idle clocks won't make much of a difference for modern CPUs as the cores are gated when idle anyway.

    With the trend for lower power consumption, maybe we'll start to see voltages set more appropriately by the MFR?

    Anyway, I can't authoritatively say you *will* have problems using offset undervolting, but I'd like to see some more testing into the subject before I trust it; it just seems there's a potential for problems there. Maybe it's something Hexus could test out?

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