AMD - Piledriver chitchat

[DanceswithUnix]

But for desktops, offloading physics to the IGP makes sense.

Except it will generate heat which will stop the cpu from hitting its max boost frequency.

Now, if the graphics was integrated into the chipset...

[watercooled]

Or if the form factor was dictated by what is technically possible rather than what is desired by the marketing team. Now there's a thought...

[scaryjim]

So based on the experience with Dirt:Showdown due to DirectCompute, does that suggest it will have poor performance on GK104 based graphics cards?

Until nvidia find some way around it in drivers (I believe they released a driver update that improved performance in Dirt?) - although whether they'll do that by improving compute performance or just circumventing compute heavy code I wouldn't care to speculate...

[CAT-THE-FIFTH]

AMD seems to be selling more graphics cards in the UK now:

http://www.fudzilla.com/home/item/30...eloaded-worked

[watercooled]

I know it's not completely relevant, but I've just discovered, thanks to Wikipedia, that Adreno is an anagram of Radeon.

Adreno, formerly Imageon, used to belong to ATI before Qualcomm bought it, so it's probably not accidental.

[CAT-THE-FIFTH]

http://semiaccurate.com/forums/showp...postcount=1663

What do people think??

[DanceswithUnix]

Doesn't make any sense to me.

1/ Don't see how it could be attached to the instruction pipeline of the cpu without heavily loading up part of the core with capacitance and hence destroying the frequency that core can run at. It also shouldn't be necessary, the 387 extended the 386 instruction set with floating point instructions without any internal connections, that is old tech.

2/ Why would you custom design a device for some floating point? Just lob another graphics chip on there, then you can use it for gpgpu if you want floating calcs or you can just crossfire if you have no other use.

3/ 16 way simd, just how would you use that then? If that is a total, then it seems weak compared to a gpu. But 16 in a single simd instruction? The SH4 in the dreamcast had a vector unit that can retire a dot product per clock, what maths are they doing with 16 operations? What are they trying to do that isn't already in the gpu?

There might be a hint of truth in there, but it sounds like a bunch of guesses to me.

[scaryjim]

tbh I don't really see how it could be connected to the instruction pipeline without majorly reworking the CPU core - otherwise how would the instruction pipeline know when to dispatch to it? Or are we meant to believe that it covertly monitors and intercepts instructions transparently to the rest of the CPU?

If it was a piece of Sony IP that AMD had worked into a custom CPU core design, based on Jaguar but with a much fatter FPU, I could almost believe that. But coprocessors are very old hat, and if it's only running at 300MHz a jaguar core could take about 6 clock cycles to retire a 512bit flop and still do it faster (based on the 1.85GHz clock speed I've seen rumoured). Given the standard jaguar FPU can handle a 256bit AVX instruction per clock anyway (if I'm reading the released info right), I imagine it would be able to spit out 512bit instructions faster than that. So I can't really see a 300MHz coprocessor actually making that much difference - whereas a fatter FPU replacing the standard jaguar one could.

Alternatively, it could be another hang off the memory crossbar, utlising some aspects of AMDs HSA. Perhaps it has some special Sony-sauce instructions that make you a cup of tea while you're playing COD...

[DanceswithUnix]

Sony do have a history of bonkers designs.

The three vector units of the PS2 that I gather most devs left alone because they were just plain confusing.
The wacky Cell architecture of the PS3 that was supposed to take the world by storm but apart from the PS3 ended up in some IBM kit and a couple of tellies that I don't think sold at all well.

If they could scale the PS3 down to a die that could hang off the memory interface of the main CPU, then that would be neat.

[watercooled]

Err...what??!?
http://www.techpowerup.com/gpudb/212..._HD_Malta.html

Edit: That's MASSIVE even by Nvidia's standards, and something doesn't look quite right about the shader count vs increase in transistors. After some searching, most places are reporting Malta as a dual-GPU part of some sort.

[DanceswithUnix]

Release date April 1st mind

[CAT-THE-FIFTH]

http://forums.hexus.net/pc-hardware/...-gpu-card.html

[DanceswithUnix]

More rumours that there will be a consumer version of the PS4 chip.

http://www.fudzilla.com/home/item/30...4-chip-rumours

So the chip that we don't know exactly how big/fast it is, will have a version cut down by an unspecified amount.
Or is this just the original 4 core version that has been on the road map for ages?

All is now clear

[Terbinator]

Could be great for a F@H node if its 8 cores in a low TDP and low cost?

[CAT-THE-FIFTH]

It could be just the Jaguar quad SOC we know about. However,AMD might market it as having technology found in the PS4,to make it look better to Joe and Jane Bloggs.

[Biscuit]

It could be just the Jaguar quad SOC we know about. However,AMD might market it as having technology found in the PS4,to make it look better to Joe and Jane Bloggs.

Should work in all fairness. exactly the kind of exposure AMD need.