Given it's an engineering sample, I'd say .... testing it?
We don't actually know what's happening with Snowy Owl yet, but since a 12 core CPU must be at least a 2 die MCM, you need to consider that clocking it higher will mean an increased TDP: e.g. the 1600 with 65W TDP is 3.2GHz - 3.6GHz. From that we can surmise that a 12 core processor at the same clocks would require a 130W TDP - quite sizeable.
At a rough guess I'd say Dell's 12 core ES probably targets a 95W TDP. Interestingly, 95W is the top TDP for AM4. Snowy Owl on AM4 after all? I wonder if there are NC pins on AM4 that can be used to plumb out more PCIe lanes and/or memory channels...? Could X399 use the same socket in a different configuration, and if so how much cross compatibility would there be*?
Oh, so many questions...!
* EDIT to add:
It occurs that the Snowy Owl SCM and MCM packages mentioned in slides share a pin-compatible BGA interface. What if AM4 is actually designed for 2 die MCMs and the Ryzen chips released so far only use a limited subset of its pins...?