Forgive the double post, but now I've had a chance to read the patent. In essence, not much new hardware needed at all, just a fixed function ray intersection engine, which is added into the texture pipeline.
Shaders (flexible function) are used to schedule stuff. They send instructions to the texture processor which is fairly fixed function - it performs BVH node look up (it's designed to be fast at look ups, that's a large part of texture processing) and passes that to the new fixed function intersection engine that's now part of the texture pipeline. Intersection stuff happens and results are passed back to the shaders which schedule what needs to happen next.
The BVH lookup/intersection is the slow bit in RT at the moment, so making that fixed function where it can be, and utilising fast lookup processors, is how AMD have got RT in there with little additional cost.
One concern might be falling back to shaders for the intersection stuff if you're not using functionally that's covered in the fixed function stuff. You're also now sharing texture processing and buffers/cache as posters have mentioned above, so if they're under strain then RT performance will take a hit too (or vice versa). Are AMD beefing up the texture processor/caches? I couldn't see it obviously.