AMD - Zen chitchat

[watercooled]

IIRC yield tends to decrease with something like the square of die size*, so having a multiple, smaller dies should be massively beneficial in terms of yield and binning. TBH I'm surprised it's not higher than that given they have some experience with 7nm already and the node isn't brand new, but it's still early days for that product I guess.

*Of course that's an over-simplification of a fairly complex matter, but it's a rough estimate of yields for 'perfect' dies due to defect density. In reality there are generally many ways to repair/salvage dies.

[Xlucine]

Yield decreases to the power of the die area. If there's some probability that a given square mm of die doesn't have a defect, and a perfect die needs to have no defects, then P(perfect die) = P(no defect on a given square mm)^(die size)

[Corky34]

Apologies for posting another Level1Tech video but Wendell sat down and had a chat with Ian from Anandtech that i found interesting.

[watercooled]

Yield decreases to the power of the die area. If there's some probability that a given square mm of die doesn't have a defect, and a perfect die needs to have no defects, then P(perfect die) = P(no defect on a given square mm)^(die size)

Yeah that's a far more realistic approximation, the squaring didn't sit right with me though I've definitely read that quoted a few times in articles, just never actually sat and thought about it properly.

The point I was aiming to make though, is it's not a linear decrease with die area increase, and as such separating them out into chiplets should in theory lift yields/help binning substantially as others have said.

[Xlucine]

Yeah that's a far more realistic approximation, the squaring didn't sit right with me though I've definitely read that quoted a few times in articles, just never actually sat and thought about it properly.

The point I was aiming to make though, is it's not a linear decrease with die area increase, and as such separating them out into chiplets should in theory lift yields/help binning substantially as others have said.

Yep. It's like the first ryzen, but more so with even smaller dies. Chiplet graphics will revolutionise the GPU business to twice the extent that ryzen has changed CPUs, once someone makes it work.

[kalniel]

Someone's posted a very nice geekbench score... (still up on the geekbench results browser, so not faked, but probably overclocked).
AMD Matisse, 3.3ghz base, 5.2ghz max. 16 core, 32 threads... Ram at a speedy 4266mhz too..
Single thread: 6714
Multi-thread: 64953

https://browser.geekbench.com/v4/cpu/13669931

[jigjog888]

any news yet on the bundled coolers with Ryzen 3000 series, if at all ?

[lemonsqueezy]

any news yet on the bundled coolers with Ryzen 3000 series, if at all ?

https://www.amd.com/en/technologies/cpu-cooler-solution Scroll down to `BUNDLED THERMAL SOLUTION` and you should see them all listed there. Last time I checked there was some level of inconsistency between the product page and this chart.

[kompukare]

Bits'n'Chips say they have information that Zen2 chiplet yields are now 'over 85%':
https://www.bitsandchips.it/english-...-very-good-job

According to our sources, the yields of Zen 2 are enhancing quickly. Three months ago we wrote that Zen 2 yields (100% fully working chip) were about 70%. Today, yields are about 85%!

Zen 2 yields are still a little bit lower than Zeppelin ones (Today at +90%), but at this rate Zen 2 will be inexpensive to produce. TSMC 7nm yields are near 16nm yields (Source), and 7nm wafer cost is now under 10k Dollar (IBS Research).

So putting that into a yield calculator
http://www.isine.com/resources/die-yield-calculator
along with Navi's (and Polaris with an estimate of $4,400 per wafer from around the Polaris launch), we get something like this:

Obviously Zen2 has a the IO die too and the new mixed node packaging might cost a bit extra too, but not bad.
As for Navi, it is a lot more expensive than what Polaris launched at, assuming that wafer estimate is anywhere near to being correct - I could only find one place which mentioned it around that time, and that was more TSMC whereas AMD might well have had a better deal from GF (or if they didn't use wafers they'd have to pay anyhow due to the WSA).
No idea what GDDR6 costs, but compared to Vega the whole card must be far cheaper to produce.

[chicken112]

Does the 3600x justify the $50 increase over the 3600?

Very interesting, any idea if high yields correlates with better quality. I'm interested in whether future ryzen 3000 chips will have better overclocking potential than the launch chips as we have seen this in the past.

[Corky34]

I couldn't find a X570 motherboard thread so I'll post this hear..



The TLDW version is he tested the power draw of the X570 chipset and found that a PCIe 4.0 NVME drive results in the same power draw as a 3.0 device, even though he was confused by what he discovered i suspect he got caught up in the rumor that its increased power requirement was due to PCIe 4.0 when personally i believe it's actually down to how many devices you hang off it.

[watercooled]

Bits'n'Chips say they have information that Zen2 chiplet yields are now 'over 85%':
https://www.bitsandchips.it/english-...-very-good-job

So putting that into a yield calculator
http://www.isine.com/resources/die-yield-calculator
along with Navi's (and Polaris with an estimate of $4,400 per wafer from around the Polaris launch), we get something like this:

Obviously Zen2 has a the IO die too and the new mixed node packaging might cost a bit extra too, but not bad.
As for Navi, it is a lot more expensive than what Polaris launched at, assuming that wafer estimate is anywhere near to being correct - I could only find one place which mentioned it around that time, and that was more TSMC whereas AMD might well have had a better deal from GF (or if they didn't use wafers they'd have to pay anyhow due to the WSA).
No idea what GDDR6 costs, but compared to Vega the whole card must be far cheaper to produce.

Interesting, very good (but not unexpected given area) yields for Zen2 if true. I assume the Polaris comparison is using release date yields/cost? Or are they really suggesting that defect density on 14nm *right now*? I know they're likely only ballparking it, but still impressive it true - 7nm is still quite new!

I couldn't find a X570 motherboard thread so I'll post this hear..



The TLDW version is he tested the power draw of the X570 chipset and found that a PCIe 4.0 NVME drive results in the same power draw as a 3.0 device, even though he was confused by what he discovered i suspect he got caught up in the rumor that its increased power requirement was due to PCIe 4.0 when personally i believe it's actually down to how many devices you hang off it.

I've just watched that myself. The way I interpreted it, the chipset may be drawing more power because of the PCIe 4 capability and PCIe 4 link to the CPU, not just because of active PCIe 4 links. It would seem there's room for improvement though, e.g. I wonder how much is being properly gated when unused?

[Corky34]

You mean the increased power draw at idle between the X470 and X570?

I get what you mean if so but i think that could be down to X570 just supporting more connections, i just tried working out if it did but got totally confused.

[watercooled]

Yeah I'm referring to idle draw mostly. Only speculating though.

[badass]

You mean the increased power draw at idle between the X470 and X570?

I get what you mean if so but i think that could be down to X570 just supporting more connections, i just tried working out if it did but got totally confused.

I suspect it's just that the x570 die is simply identical to the I/O Die on the Ryzen 3000 Processor - i.e. not optimised for the use as a chipset and a bit of a power hog with the bare minimum turned on to operate as a north/southbridge. I thought it a bit off but for speed to market I guess it makes sense. It's successor will probably be made on a similar process but significantly lower TDP.

[kalniel]

I suspect it's just that the x570 die is simply identical to the I/O Die on the Ryzen 3000 Processor

And it's on a slightly less efficient 14nm vs 12nm for the CPU version.