AMD - Zen chitchat

[Corky34]

Sounds more like a proactive excuse for platform segmentation.

https://www.phoronix.com/forums/foru...e4#post1215694



This was before the RDNA2 launch,so it works fine on older systems,which would imply at least Zen2 and RDNA1.

Remember,AMD was implying you "needed" PCI-E 4.0 for it too,yet we saw PCI-E 3.0 was fine,so unless they release it and it happens,I don't believe what random people on a forum are saying. I would put more faith in a person who is involved with actual driver development! It would be major egg on the face,if Nvidia brings its equivalent to Zen2,and AMD can't!

It's not a random person on a forum, it's CapFrameX, Frame time capturing + analysis, OSD, sensor logging, hardware testing, on twitter. They do mention that Zen 3 has a 32bit MMIO register width just like Zen 2 but it's the "full-rate _pdep_u32" that isn't supported on Zen 2, whatever that is.

Just looked that up and found this Intel developer guide, it's gobbledygook to me but i think it's an CPU extension/instruction.

[CAT-THE-FIFTH]

It's not a random person on a forum, it's CapFrameX, Frame time capturing + analysis, OSD, sensor logging, hardware testing, on twitter. They do mention that Zen 3 has a 32bit MMIO register width just like Zen 2 but it's the "full-rate _pdep_u32" that isn't supported on Zen 2, whatever that is.

Smart Access Technology works just fine on Linux. It is resizeable BAR support which Linux has supported for years (AMD actually added support for this), but which is relatively new on windows. You just need a platform with enough MMIO space. On older systems this is enabled via sbios options with names like ">4GB MMIO".

The chap on Phoronix is no random guy either - he actually is responsible for a lot of AMD(and in the end ATI) work under Linux for their GPUs. He made the post before the RX6000 series was released.Linux has similar functionality for a few years,and AMD added support for earlier AMD CPUs and GPUs. So earlier means at least Zen2 and RDNA1.

Nvidia has also said they are going to release their version too.

After all if it were some revolutionary feature,why do you think Haswell supports it fine? This is just like a ton of other stuff AMD makes up it can't support on earlier systems. In fact support under Windows is not a new thing either IIRC.

One was the rubbish about PCI-E 4.0 not working on 400 series motherboards,until OEMs showed it was a load of nonsense. The same with Zen3 not working with earlier chipsets(ironic when the A520 and B550 are based on them),and they backtracked.Then the implication that PCI-E 4.0 was needed for SAM,until AMD admitted it wasn't required,and OEMs forced their hand on Intel systems.

It wouldn't surprise me one bit if Nvidia gets this to work,and suddenly AMD finds a way! Plus its hilarious a 7 year Intel design supports features than even an 18 month AMD one can't support properly. If that is the case,one has to wonder if Zen3 has certain features not working which AMD is holding back support for in Zen4. It certainly means for me,once DDR5 is mainstream whether I should just go for an Intel system in a few years.

It seems AMD not only can't support its processors properly,but feature support is hit and miss,just like with their GPUs. Even RDNA1 is not a good buy,as its feature support like with Vega was broken and Nvidia is far ahead.I am not even talking about RT here,just actual DX12 tier support!

As someone who does keep their systems for a longtime,its nice AMD having more upgrade options but its pointless if they can't support common features that their competitors for years(and run faster),and then on top of this overprice the upgrade path.

This means Zen2 will only start falling more and more behind CFL in gaming. CFL just got a nice performance boost over Zen2.

Intel and Nvidia must be laughing their faces off its like Christmas coming early for them.

[Corky34]

I wasn't trying to suggest the guy on Phoronix was some random guy, i thought you meant the guy on twitter was the random, NVM, my mistake.

I agree it's not a revolutionary feature but it's dependant on the CPU, specifically if it supports a particular instruction, Haswell onwards have it's just Nvidia or Radeon never bothered to make use of it, Zen 3 apparently is the first Zen to support that instruction. I'm guessing AMD saying we've included this old instruction in Zen3 that's been around for 7 years wouldn't have made for good marketing.

[kompukare]

x86 instruction set support is a minefield at the best of times anyhow not just in terms of supported instructions but also in terms of implementation. I'm sure all those crypto instructions which Zen runs faster is down to implementation.
Seems that Intel introduced this only in some revisions of Haswell according to
https://www.chessprogramming.org/BMI2
as reported by CB. AMD first supported with Excavator but only via microcode emulation. Zen3 is the first to run it natively. If that instruction is the only way to implement this, Zen 2 is going to be left out in the cold.

[scaryjim]

... Zen 3 apparently is the first Zen to support that instruction. ...

I mentioned this on a news item recently too - the earlier AMD processors support the instruction, but they do it in software (i.e. via microcode) rather than in hardware, which gives it significant latency (iirc it's 18 cycles, rather than 1). So while the feature would undoubtedly work on earlier AMD processors (everything back to Excavator, iirc), it's questionable as to whether it would provide any significant performance boost, due to the additional latency.

[DanceswithUnix]

I mentioned this on a news item recently too - the earlier AMD processors support the instruction, but they do it in software (i.e. via microcode) rather than in hardware, which gives it significant latency (iirc it's 18 cycles, rather than 1). So while the feature would undoubtedly work on earlier AMD processors (everything back to Excavator, iirc), it's questionable as to whether it would provide any significant performance boost, due to the additional latency.

It is in microcode because it is one of the most singularly pointless instructions I have ever come across. Never in decades of device driver writing have I thought "what I need is an instruction where I give it a mask and it unpacks the bits into the given locations". I cannot imagine why any hardware feature needs that instruction, let alone this one.

Whereas mapping the entire ram into the CPUs address map, which is something done once, seems very useful. I hate memory windows, they really slow you down. The downside is that even with 1GB huge pages it would take 16 entries in the page tables to map a modern 16GB card which might have some impact on the tlb. So perhaps they are using that instruction to move a 1GB page around the card, substituting a small 256MB window for one just 4 times larger but with a better setup latency. That would seem sucky.

[Nelly.]

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[CAT-THE-FIFTH]

https://twitter.com/IanCutress/statu...042120194?s=20

Got a response from AMD about PDEP and SAM:

'Smart Access Memory does not depend on the performance of the PDEP instruction.'

The speculation about accelerated PDEP on Zen3 being a factor seems to not be the case.

[Corky34]

https://twitter.com/IanCutress/statu...042120194?s=20

Interesting, so where or what is the difference between Haswell+ supporting it and Zen 3 but not Zen 1 and 2.

Is it really just an arbitrary decision to not support it on old Zen.

[DanceswithUnix]

Is it really just an arbitrary decision to not support it on old Zen.

I could be that there is a fix in the PCIe root that is in all Zen3 chips. If that is the case then I would expect it to be in the new Zen2 chips as they supposedly use the same silicon, but then you get into the whole problem of telling customers that they can't know whether their Zen2 works until you try it which might not go down well, but I think would actually be better given it is a BIOS option that only enthusiasts are going to know how to even find. That's an educated guess, I struggle to think of any other scenario from what we have been told.

My X470 board now has this option and I can enable it, but if I enable it with my early 3700X it boot loops back into the BIOS setup screen. I have a work 3700X cpu turning up in a few days which is going into an X570 board, I will have a play with that.

Glad the PDEP stuff is squashed, that was clearly utter nonsense.

[Xlucine]

Zen3 epyc is with reviewers:
https://www.youtube.com/watch?v=Rqet...youtu.be&t=815

The plot thickens - somehow STH managed to buy a milan chip?
https://youtu.be/g63jaYgRtm8?t=613

All of us struggling to buy ryzen 5000 and they manage to buy something that isn't even launched yet!

[CAT-THE-FIFTH]

SAM tested on a Ryzen 9 3950X:
https://overclock3d.net/reviews/gpu_...esizable_bar/1

[Essexboy]

Good to hear they are supporting the older chips

[kompukare]

SAM tested on a Ryzen 9 3950X:
https://overclock3d.net/reviews/gpu_...esizable_bar/1

AC:V at 4K has the mins increase from 36.6 to 47 which is nearly 30% and pretty impressive, although that is the outliner.

[DanceswithUnix]

AC:V at 4K has the mins increase from 36.6 to 47 which is nearly 30% and pretty impressive, although that is the outliner.

Nice. Now do I wait for them to support my Vega 56 (which currently boot loops back into the BIOS if I enable this) or is it an excuse to get a 6000 series gpu?

[Essexboy]

Does this work on the older Nvidia cards?