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About LinkBacksIf they are working on Zen 5, then that does imply a yearly release because working on a CPU 10 years out is too far.Originally Posted by CAT-THE-FIFTH
If they are working on Zen 5, then that does imply a yearly release because working on a CPU 10 years out is too far.
I'm only guessing but wouldn't it be a 2 year cycle, its been a year since Zen' release and were now getting Zen+ which (afaik) is more a node shrink with a little tweaking, Ryzen 1000 and 2000 are all (afaik) based on the first revision of Zen, Ryzen 3000 and 4000 would be Zen 2, Ryzen 5000 and 6000 would be Zen 3, and so on.
A bit like the old Intel tick-tock release cycles, although where that leaves the node size doesn't seem to match as if a node shrink is introduce after every redesign that seems to be pushing how small current node are (7-10nm).
Last edited by Corky34; 10-04-2018 at 11:17 AM.
Its good to see they are doing that as in the past,ie,with the Phenom and FX series the updates could be a bit hit and miss.
Zen+ is sometimes called Zen 2,so its hard to say whether the numbers are major new cores,or just each new revisions.
If it is 2 year cadences,that would hint at 10 years,which is more than what I remember AMD saying Zen would last before their next new uarch,and unless Zen 5 is essentially a new core,I would expect Intel might also have a new design out within 10 years too,so I am uncertain how well an iterative design might work out.
That seems to make more sense, it would mean Zen 5 would be a major redesign, Zen 4 would be a tweak on Zen 3's major redesign and Zen 2 a tweak on the original Zen.
It seems a website has tested the Ryzen 5 2600 on an X370 motherboard:
https://translate.google.co.uk/trans...ios&edit-text=
If you look at the details the tick-tock thing was always hogwash even before Intel's process roadmap fell apart and the "refresh" parts became the norm. But then the whole "this is a new architecture" thing is marketing tripe, you can trace a modern i7 back to the Pentium Pro via a long series of sometimes aggressive evolutionary steps. You don't get many actual new architectures, Intel's most recent was Atom, before that probably Pentium 4, then I guess it was Itanium. Note that the last two were evolutionary dead ends, discarded when Pentium-M went back to being Pentium-III based.
Evolution is massively powerful, yet people seem to treat it as a dirty word in tech.
So each step counts, don't dismiss the ones that are "mostly a process change" as even with Intel they generally aren't. I think that whole marketing thing is more about expectation management so if the new process starts with poor yields and no performance improvement then that's what people were pretty much told to expect anyway.
No way Ryzen 5 is 10 years into the future. They have to be talking yearly updates.
I think that was more lack of focus and being afraid to take risks. The thing with Ryzen is how hard they pushed in all the little details.
Horizon scanning for something 10 years out doesn't sound too outlandish, and that'd probably get logged in his timesheet (assuming they use them) as going under zen 5. A few hours a month is enough to announce to investors that zen 5 is in the pipeline without being anywhere near starting to tape it out
I don't even think you can say with certainly that it will be made on Silicon with FETs on that timescale! That makes basics like pipeline depth impossible to guess. You end up with something as wooly as "Target of 10% faster than Ryzen 4".
True but the marketing designations where as good as any to describe the changes from one generation to another, as in changes worth talking about (feature additions) and the emphasis on design tweaks over feature additions.
Yea, i get the impression when he's talking about Ryzen 5 that he's talking about what us common folk would consider the 3rd major revision, *to me Ryzen 2 due out this month would be considered a minor revision as afaik it doesn't add any new features it "just" tweaks the design of the original Ryzen.
*That's not to say it's not going to bring improvements before any AMD fan jumps down my throat.
Messing with the cache hierarchy is a pretty major bit of engineering, and re-doing the power management isn't small fry either. It isn't as fancy as "we went from 5 issue to 6 issue width" style announcements, but these changes affect damned near every instruction executed and certainly every clock cycle of the cpu. Speeding every instruction a bit is more important than speeding an instruction that you only execute once in a blue moon by a lot (Amdahl's law).
Isn't that what i said, i could have sworn that's what i said, oh never mind.
Exactly - someone at AMD has to keep an eye on all the researchers who are trying to replace silicon, and that work needs a project to be assigned to. So they call it work on zen 5! That makes their statement entirely technically correct, just without much actual information conveyed
I'm pretty sure Ryzen 5 is targeting 2022: mainly from this slide that was included in the main site coverage of the story:
Note that while 'Zen' is listed on both 14nm and 14nm+, Zen 2 is on 7nm, and Zen 3 on 7nm+ arriving in/before 2020. So it looking like it's only Zen 1 that's crossing process optimisations, and future 'major' revisions will be dropping yearly along with process tweaks....
Apparently, AMD might skip over the Zen 4 name due to the usual superstitions: https://videocardz.com/75848/amd-alr...rking-on-zen-5
Two new budget X370 based motherboards have been released by Gigabyte and both are under £80:
https://www.cclonline.com/product/24...board/MBD2328/
https://www.cclonline.com/product/24...board/MBD2329/
Both have support for Raven Ridge out of the box:
https://www.gigabyte.com/Motherboard...1x#support-cpu
https://www.gigabyte.com/Motherboard...1x#support-cpu
So i stumbled upon this wiki entry on wikichips that talks about Infinity Fabric and found it an interesting read, it's probably old news to some people but i found it enlightening to learn more about the mysteries of IF (particularity that IF doesn't use a clock skew because doing so would increase latency) .
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